James F. Parker

According to our database1, James F. Parker authored at least 4 papers between 1993 and 1998.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

1998
A 1.6-GHz CMOS PLL with on-chip loop filter.
IEEE J. Solid State Circuits, 1998

A CMOS transceiver for 10-Mb/s and 100-Mb/s Ethernet.
IEEE J. Solid State Circuits, 1998

1995
A CMOS continuous-time NTSC-to-color-difference decoder.
IEEE J. Solid State Circuits, December, 1995

1993
Block-Diagram-Level Design Capture, Functional Simulation, and Layout Assembly of Analog CMOS ICs.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993


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