# James W. Haslett

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Collaborative distances:

^{1}, James W. Haslett authored at least 44 papers between 1992 and 2020.Collaborative distances:

## Timeline

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## Bibliography

2020

Passive Third-, Fourth-, and Fifth-Order Reconfigurable D-Band Frequency Multipliers Based on Switched-Capacitor Varactors.

Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020

2016

5-bit 5-GS/s Noninterleaved Time-Based ADC in 65-nm CMOS for Radio-Astronomy Applications.

IEEE Trans. Very Large Scale Integr. Syst., 2016

IEEE Trans. Very Large Scale Integr. Syst., 2016

2015

IEEE Trans. Circuits Syst. I Regul. Pap., 2015

Circuits Syst. Signal Process., 2015

2014

A 65-nm CMOS 10-GS/s 4-bit Background-Calibrated Noninterleaved Flash ADC for Radio Astronomy.

IEEE Trans. Very Large Scale Integr. Syst., 2014

Differential-Time and Pulse-Amplitude Modulation Signaling for Serial Link Transceivers.

Proceedings of the IEEE 44th International Symposium on Multiple-Valued Logic, 2014

2013

J. Signal Process. Syst., 2013

Low-power CMOS inductorless bandwidth-enhanced transimpedance amplifier for short-haul applications.

Proceedings of the 2013 IEEE Radio and Wireless Symposium, 2013

Comparing Performance of a Multiple-Valued Time-Based Serial Data Link with Other Serial Links.

Proceedings of the 43rd IEEE International Symposium on Multiple-Valued Logic, 2013

Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013

2012

Proceedings of the 10th IEEE International NEWCAS Conference, 2012

Proceedings of the 42nd IEEE International Symposium on Multiple-Valued Logic, 2012

Proceedings of the 25th IEEE Canadian Conference on Electrical and Computer Engineering, 2012

2011

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

2010

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2009

IEEE J. Solid State Circuits, 2009

Proceedings of the First International Conference on Advances in Multimedia, 2009

Proceedings of the 16th IEEE International Conference on Electronics, 2009

2008

IEEE Trans. Instrum. Meas., 2008

2007

Correction to "Noise Figure Optimization of Inductively-Degenerated CMOS LNA's With Integrated Gate Inductors".

IEEE Trans. Circuits Syst. I Regul. Pap., 2007

Sub-0.2 dB Noise Figure Wideband Room-Temperature CMOS LNA With Non-50 Ω Signal-Source Impedance.

IEEE J. Solid State Circuits, 2007

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

A 0.18µm CMOS 2.1GHz Sub-sampling Receiver Front End with Fully Integrated Second- and Fourth-Order Q-Enhanced Filters.

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

2006

Noise figure optimization of inductively degenerated CMOS LNAs with integrated gate inductors.

IEEE Trans. Circuits Syst. I Regul. Pap., 2006

EURASIP J. Wirel. Commun. Netw., 2006

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

A CMOS integrated linear voltage-to-pulse-delay-time converter for time based analog-to-digital converters.

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Linearization Techniques for Cross-Coupled Transconductor Circuits Used in Integrated Q-Enhanced LC Filters.

Proceedings of the Canadian Conference on Electrical and Computer Engineering, 2006

On Selection of Optimum Signal Source Impedance for Inductively-Degenerated CMOS LNAS.

Proceedings of the Canadian Conference on Electrical and Computer Engineering, 2006

2005

Recent Advances and Future Trends in Low Power Wireless Systems for Medical Applications.

Proceedings of the 5th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC 2005), 2005

Design and Optimization of Low-Voltage Low-Power Quasi-Floating Gate Digital Circuits.

Proceedings of the 5th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC 2005), 2005

A CMOS Quality Factor Enhanced Parallel Resonant LC-Tank with Independent Q and Frequency Tuning for RF Integrated Filters.

Proceedings of the 5th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC 2005), 2005

A re-configurable high-speed CMOS track and latch comparator with rail-to-rail input for IF digitization [software radio receiver applications].

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2004

SOC Design of an IF Subsampling Terminal for a Gigabit Wireless LAN with Asymmetric Equalization.

Proceedings of the 4th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'04), 2004

A DC-6 GHz, 50 dB dynamic range, SiGe HBT true logarithmic amplifier.

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

2003

A 0.28µm CMOS Bluetooth Frequency Synthesizer for Integration with a Bluetooth SOC Reference Platform.

Proceedings of the 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'03), 30 June, 2003

A high speed complex adaptive filter for an asymmetric wireless LAN using a new quantized polynomial representation.

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

2000

IEEE Trans. Geosci. Remote. Sens., 2000

1992

The complex resistivity response of a homogeneous Earth with a finite-length contained vertical conductor.

IEEE Trans. Geosci. Remote. Sens., 1992