Jamshaid Sarwar Malik

According to our database1, Jamshaid Sarwar Malik authored at least 8 papers between 2010 and 2016.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2016
Gaussian Random Number Generation: A Survey on Hardware Architectures.
ACM Comput. Surv., 2016

2015
Revisiting Central Limit Theorem: Accurate Gaussian Random Number Generation in VLSI.
IEEE Trans. Very Large Scale Integr. Syst., 2015

2013
A code generation method for system-level synthesis on ASIC, FPGA and manycore CGRA.
Proceedings of the 1st International Workshop on Many-core Embedded Systems 2013, 2013

Unifying CORDIC and Box-Muller algorithms: An accurate and efficient Gaussian Random Number generator.
Proceedings of the 24th International Conference on Application-Specific Systems, 2013

2012
Effort, resources, and abstraction vs performance in high-level synthesis: finding new answers to an old question.
SIGARCH Comput. Archit. News, 2012

2011
Generating high tail accuracy Gaussian Random Numbers in hardware using central limit theorem.
Proceedings of the IEEE/IFIP 19th International Conference on VLSI and System-on-Chip, 2011

An efficient hardware implementation of high quality AWGN generator using Box-Muller method.
Proceedings of the 11th International Symposium on Communications and Information Technologies, 2011

2010
Improving performance of fading channel simulators by use of uniformly distributed random numbers.
Proceedings of the IEEE International Symposium on Signal Processing and Information Technology, 2010


  Loading...