Jan C. Kleinsorge

According to our database1, Jan C. Kleinsorge authored at least 8 papers between 2009 and 2015.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2015
Tight integration of cache, path and task-interference modeling for the analysis of hard real time systems.
PhD thesis, 2015

2014
Static WCET analysis of the H.264/AVC decoder exploiting coding information.
Proceedings of the 2014 IEEE 20th International Conference on Embedded and Real-Time Computing Systems and Applications, 2014

Computing maximum blocking times with explicit path analysis under non-local flow bounds.
Proceedings of the 2014 International Conference on Embedded Software, 2014

2013
Simple analysis of partial worst-case execution paths on general control flow graphs.
Proceedings of the International Conference on Embedded Software, 2013

2012
WCET-aware static locking of instruction caches.
Proceedings of the 10th Annual IEEE/ACM International Symposium on Code Generation and Optimization, 2012

2011
A synergetic approach to accurate analysis of cache-related preemption delay.
Proceedings of the 11th International Conference on Embedded Software, 2011

WCET-driven branch prediction aware code positioning.
Proceedings of the 14th International Conference on Compilers, 2011

2009
Optimal static WCET-aware scratchpad allocation of program code.
Proceedings of the 46th Design Automation Conference, 2009


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