Javier del Pino

Orcid: 0000-0003-2610-883X

Affiliations:
  • University of Las Palmas de Gran Canaria, ULPGC, Institute for Applied Microelectronics, IUMA, Spain


According to our database1, Javier del Pino authored at least 15 papers between 2002 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

Online presence:

On csauthors.net:

Bibliography

2023
A Ku-Band GaN-on-Si MMIC Power Amplifier with an Asymmetrical Output Combiner.
Sensors, July, 2023

A 2-V 1.4-dB NF GaAs MMIC LNA for K-Band Applications.
Sensors, January, 2023

2022
Phased Array Antenna Analysis Workflow Applied to Gateways for LEO Satellite Communications.
Sensors, 2022

Miniature Wide-Band Noise-Canceling CMOS LNA.
Sensors, 2022

Area-Efficient Integrated Current-Reuse Feedback Amplifier for Wake-Up Receivers in Wireless Sensor Network Applications.
Sensors, 2022

2021
A New Current-Shaping Technique Based on a Feedback Injection Mechanism to Reduce VCO Phase Noise.
Sensors, 2021

2020
Single-Event Transients in an IEEE 802.15.4 RF Receiver for Wireless Sensor Networks.
Sensors, 2020

Low-Power RFED Wake-Up Receiver Design for Low-Cost Wireless Sensor Network Applications.
Sensors, 2020

An Analytical Scalable Lumped-Element Model for GaN on Si Inductors.
IEEE Access, 2020

Distributed power amplifier in GaN technology with tapered drain lines.
Proceedings of the XXXV Conference on Design of Circuits and Integrated Systems, 2020

2019
Power Amplifiers Load Modulation Techniques for 5G in GaN-on-Si Techonology.
Proceedings of the XXXIV Conference on Design of Circuits and Integrated Systems, 2019

2018
Single event transients mitigation techniques for CMOS integrated VCOs.
Microelectron. J., 2018

2015
A RF front-end for DVB-SH based on current conveyors.
Microelectron. J., 2015

2011
On-Chip inductors Optimization for Ultra Wide Band Low noise Amplifiers.
J. Circuits Syst. Comput., 2011

2002
Integrated Inductors Modeling and Tools for Automatic Selection and Layout Generation.
Proceedings of the 3rd International Symposium on Quality of Electronic Design, 2002


  Loading...