Antonio Núñez
Orcid: 0000-0003-1295-1594
According to our database1,
Antonio Núñez
authored at least 52 papers
between 1987 and 2019.
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Bibliography
2019
Proceedings of the XXXIV Conference on Design of Circuits and Integrated Systems, 2019
2017
Programmable SoC platform for deep packet inspection using enhanced Boyer-Moore algorithm.
Proceedings of the 12th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2017
2014
A two-phase design space exploration strategy for system-level real-time application mapping onto MPSoC.
Microprocess. Microsystems, 2014
2013
A system-level infrastructure for multidimensional MP-SoC design space co-exploration.
ACM Trans. Embed. Comput. Syst., 2013
Contributions to visualization algorithm enabling GPU-accelerated image displaying for dual panel high dynamic range LCD display.
Proceedings of the 8th International Symposium on Image and Signal Processing and Analysis, 2013
Scalable Video Coding Deblocking Filter FPGA and ASIC Implementation Using High-Level Synthesis Methodology.
Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013
2011
Efficient FPGA implementation of a high-quality super-resolution algorithm with real-time performance.
IEEE Trans. Consumer Electron., 2011
A Low Memory Requirements Execution Flow for the Non-Uniform Grid Projection Super-Resolution Algorithm.
Proceedings of the 2011 IEEE International Symposium on Multimedia, 2011
2010
Proceedings of the 8th IEEE Workshop on Embedded Systems for Real-Time Multimedia, 2010
2009
Proceedings of the Real-Time Image and Video Processing 2009, 2009
2008
Design Space Exploration and Performance Analysis for the Modular Design of CVS in a Heterogeneous MPSoC.
Proceedings of the ReConFig'08: 2008 International Conference on Reconfigurable Computing and FPGAs, 2008
2007
IET Comput. Digit. Tech., 2007
EURASIP J. Embed. Syst., 2007
2006
Advances in video coding for hand-held device implementation in networked electronic media.
J. Real Time Image Process., 2006
Low-Cost Super-Resolution Algorithms Implementation Over a HW/SW Video Compression Platform.
EURASIP J. Adv. Signal Process., 2006
VIPACES, Verification Interface Primitives for the Development of AXI Compliant Elements and Systems.
Proceedings of the Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August, 2006
A unified system-level modeling and simulation environment for MPSoC design: MPEG-4 decoder case study.
Proceedings of the Conference on Design, Automation and Test in Europe, 2006
2005
Low-cost implementation of a super-resolution algorithm for real-time video applications.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Proceedings of the 3rd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2005
2003
J. Syst. Archit., 2003
Proceedings of the 4th International Symposium on Quality of Electronic Design (ISQED 2003), 2003
Proceedings of the 2003 IEEE International Conference on Multimedia and Expo, 2003
A Scalable Communication Platform for High Performance Multimedia Applications.
Proceedings of the First Workshop on Embedded Systems for Real-Time Multimedia, 2003
2002
Integrated Inductors Modeling and Tools for Automatic Selection and Layout Generation.
Proceedings of the 3rd International Symposium on Quality of Electronic Design, 2002
2001
Quantitative study of the impact of design and synthesis options on processor core performance.
IEEE Trans. Very Large Scale Integr. Syst., 2001
A Compact Layout Technique for Reducing Switching Current Effects in High Speed Circuits.
Proceedings of the 2nd International Symposium on Quality of Electronic Design (ISQED 2001), 2001
A compact layout technique to minimize high frequency switching effects in high speed circuits.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001
2000
Synthesis Experiments and Performance Metrics for Evaluating the Quality of IP Blocks and Megacells.
Proceedings of the 1st International Symposium on Quality of Electronic Design (ISQED 2000), 2000
Proceedings of the 2000 Design, 2000
1999
Proceedings of the 9th Great Lakes Symposium on VLSI (GLS-VLSI '99), 1999
Proceedings of the 25th EUROMICRO '99 Conference, 1999
Proceedings of the 1999 Design, 1999
Proceedings of the Seventh International Workshop on Hardware/Software Codesign, 1999
1998
A CORDIC processor for FFT computation and its implementation using gallium arsenide technology.
IEEE Trans. Very Large Scale Integr. Syst., 1998
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998
Proceedings of the 1998 Design, 1998
1997
IEEE J. Solid State Circuits, 1997
IEEE J. Solid State Circuits, 1997
1993
Microprocess. Microprogramming, 1993
Microprocess. Microprogramming, 1993
Multiobjective optimization using analytical models of GaAs high-speed digital circuits.
Microprocess. Microprogramming, 1993
Microprocess. Microprogramming, 1993
Using the ES2 library and SILOS simulator in the development of a single chip with three processors and analog IO.
Proceedings of the 1993 Euromicro Workshop on Parallel and Distributed Processing, 1993
Proceedings of the European Design Automation Conference 1993, 1993
1992
1991
Microprocessing and Microprogramming, 1991
Microprocessing and Microprogramming, 1991
1989
Microprocess. Microprogramming, 1989
Microprocessing and Microprogramming, 1989
1987