Javier Gonzalez Bayon

Orcid: 0000-0001-8810-1559

According to our database1, Javier Gonzalez Bayon authored at least 10 papers between 2004 and 2016.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

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Bibliography

2016
Security Estimation in Wireless Sensor Network Simulator.
J. Circuits Syst. Comput., 2016

2012
Evaluation of Rapid Prototyping solutions for a 802.16d frequency Offset estimation Scheme.
J. Circuits Syst. Comput., 2012

A reduced complexity scheme for carrier frequency synchronization in uplink 802.16e OFDMA.
EURASIP J. Adv. Signal Process., 2012

An Approach for Algorithm Parallelization Oriented to a Many-core Implementation.
Proceedings of the 10th IEEE International Symposium on Parallel and Distributed Processing with Applications, 2012

A Virtual Platform for Performance Estimation of Many-core Implementations.
Proceedings of the 15th Euromicro Conference on Digital System Design, 2012

2011
Hardware performance estimation by dynamic scheduling.
Proceedings of the 2011 Forum on Specification & Design Languages, 2011

2010
Improved schemes for tracking residual frequency offset in DVB-T systems.
IEEE Trans. Consumer Electron., 2010

A Multistandard Frequency Offset Synchronization Scheme for 802.11n, 802.16d, LTE, and DVB-T/H Systems.
J. Comput. Networks Commun., 2010

2005
Techniques for sensitizing RF path under SER test.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2004
Mixed Loopback BiST for RF Digital Transceivers.
Proceedings of the 19th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2004), 2004


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