Javier Vega-Pineda

According to our database, Javier Vega-Pineda authored at least 10 papers between 2004 and 2018.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2018

Smart module for measurements based on direct interfaces and FPGA-SoC.

Jose Rivera-Mejia, Rodolfo Pina-Ramirez, Javier Vega-Pineda, Jose L. Duran-Gomez

Proceedings of the IEEE International Instrumentation and Measurement Technology Conference, 2018

2016

Data fusion for a street lighting monitoring system based on statistical inference and fuzzy logic.

Carlos A. Munoz-Baca, Jose Rivera-Mejia, Javier Vega-Pineda, Jose L. Duran-Gomez

Proceedings of the IEEE International Instrumentation and Measurement Technology Conference, 2016

2014

Acceleration with FPGA for blocks and subblocks edge pattern classification in DCT domain images.

Javier Vega-Pineda, Jose Rivera-Mejia, Rafael Sandoval-Rodríguez, Gerardo Trujillo-Schiaffino

Proceedings of the IEEE International Instrumentation and Measurement Technology Conference, 2014

2013

Evaluation of the Progressive Polynomial Compensation Algorithm for dynamic or Real-Time applications.

Jose Rivera-Mejia, Job E. Villafuerte-Arroyo, Javier Vega-Pineda

Proceedings of the IEEE International Instrumentation and Measurement Technology Conference, 2013

2012

Human Sign Recognition for Robot Manipulation.

Leonardo Saldivar-Piñon, Mario Ignacio Chacon-Murguia, Rafael Sandoval-Rodríguez, Javier Vega-Pineda

Proceedings of the Pattern Recognition - 4th Mexican Conference, 2012

2009

Simplified SOM-neural model for video segmentation of moving objects.

Mario Ignacio Chacon-Murguia, Gonzalez D. Sergio, Javier Vega-Pineda

Proceedings of the International Joint Conference on Neural Networks, 2009

Set Partitioning in Hierarchical Frequency Bands (SPHFB).

Humberto Ochoa, Osslan Osiris Vergara-Villegas, Vianey Guadalupe Cruz Sánchez, Gerardo Rosiles, Javier Vega-Pineda

Proceedings of the 2009 Data Compression Conference (DCC 2009), 2009

2006

Synthesis of Pulsed-Coupled Neural Networks in FPGAs for Real-Time Image Segmentation.

Javier Vega-Pineda, Mario Ignacio Chacon-Murguia, Roberto Camarillo-Cisneros

Proceedings of the International Joint Conference on Neural Networks, 2006

2005

Image Block Edge Classification wirh Block/Subblock Conversion in Discrete Cosine Transform Domain.

Javier Vega-Pineda, José A. Salinas-Terrazas, Rafael Sandoval-Rodríguez

Res. Comput. Sci., 2005

2004

An architecture for fractal image compression using quad-tree multiresolution.

Alejandro Martínez-Ramírez, Alejandro Díaz-Sánchez, Mónico Linares Aranda, Javier Vega-Pineda

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004