Jayanth Kuppambatti

According to our database1, Jayanth Kuppambatti authored at least 6 papers between 2012 and 2014.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2014
Switched-Mode Operational Amplifiers and Their Application to Continuous-Time Filters in Nanoscale CMOS.
IEEE J. Solid State Circuits, 2014

Current Reference Pre-Charging Techniques for Low-Power Zero-Crossing Pipeline-SAR ADCs.
IEEE J. Solid State Circuits, 2014

17.9 A 0.6V 70MHz 4<sup>th</sup>-order continuous-time Butterworth filter with 55.8dB SNR, 60dB THD at +2.8dBm output signal power.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

2013
A low power zero-crossing pipeline-SAR ADC with on-chip dynamically loaded pre-charged reference.
Proceedings of the ESSCIRC 2013, 2013

Scaling analog circuits.
Proceedings of the ESSCIRC 2013, 2013

2012
A current reference pre-charged zero-crossing pipeline-SAR ADC in 65nm CMOS.
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012


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