Peter R. Kinget
Orcid: 0000-0002-5707-6394Affiliations:
- Columbia University, New York City, USA
According to our database1,
Peter R. Kinget
authored at least 153 papers
between 1994 and 2023.
Collaborative distances:
Collaborative distances:
Awards
IEEE Fellow
IEEE Fellow 2011, "For contributions to analog and radio frequency integrated circuits".
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
Online presence:
-
on orcid.org
On csauthors.net:
Bibliography
2023
A Very High Linearity Twin Phase Interpolator With a Low-Noise and Wideband Delta Quadrature DLL for High-Speed Data Link Clocking.
IEEE J. Solid State Circuits, 2023
Ultra-Low-Power and Compact-Area Analog Audio Feature Extraction Based on Time-Mode Analog Filterbank Interpolation and Time-Mode Analog Rectification.
IEEE J. Solid State Circuits, 2023
How Tiny Can Analog Filterbank Features Be Made for Ultra-low-power On-device Keyword Spotting?
CoRR, 2023
2022
Analysis of Injection-Locked Ring Oscillators for Quadrature Clock Generation in Wireline or Optical Transceivers.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022
Multi-Phase Clock Generation for Phase Interpolation With a Multi-Phase, Injection-Locked Ring Oscillator and a Quadrature DLL.
IEEE J. Solid State Circuits, 2022
Compressive-Sampling Spectrum Scanning with a Beamforming Receiver for Rapid, Directional, Wideband Signal Detection.
Proceedings of the 95th IEEE Vehicular Technology Conference, 2022
A 31-Feature, 80nW, 0.53mm<sup>2</sup> Audio Analog Feature Extractor based on Time-Mode Analog Filterbank Interpolation and Time-Mode Analog Rectification.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
A 65nm CMOS, 3.5-to-11GHz, Less-Than-1.45LSB-INLpp, 7b Twin Phase Interpolator with a Wideband, Low-Noise Delta Quadrature Delay-Locked Loop for High-Speed Data Links.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022
2021
Auxiliary Feed-Forward Noise Cancellation Techniques for a Generic Type-II Ring Oscillator Phase Locked Loop.
IEEE Trans. Circuits Syst. II Express Briefs, 2021
Double-Conversion, Noise-Cancelling Receivers Using Modulated LNTAs and Double-Layer Passive Mixers for Concurrent Signal Reception With Tuned RF Interface.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021
IEEE Trans. Circuits Syst. I Regul. Pap., 2021
A Multi-Branch Receiver With Modulated Mixer Clocks for Concurrent Dual-Carrier Reception and Rapid Compressive-Sampling Spectrum Scanning.
IEEE J. Solid State Circuits, 2021
11.4 A High-Accuracy Multi-Phase Injection-Locked 8-Phase 7GHz Clock Generator in 65nm with 7b Phase Interpolators for High-Speed Data Links.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021
2020
IEEE Trans. Circuits Syst. II Express Briefs, 2020
IEEE Trans. Circuits Syst. I Regul. Pap., 2020
A 0.032-mm<sup>2</sup> 43.3-fJ/Step 100-200-MHz IF 2-MHz Bandwidth Bandpass DSM Based on Passive N-Path Filters.
IEEE J. Solid State Circuits, 2020
Clockless, Continuous-Time Analog Correlator Using Time-Encoded Signal Processing Demonstrating Asynchronous CDMA for Wake-Up Receivers.
IEEE J. Solid State Circuits, 2020
An Ultra-Low-Power Polarity-Coincidence Feedback Time-Delay-to-Digital Converter for Sound-Source Localization.
IEEE J. Solid State Circuits, 2020
2019
Benefits of Using VCO-OTAs to Construct TIAs in Wideband Current-Mode Receivers Over Inverter-Based OTAs.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019
A 0.5 V, 9-GHz Sub-Integer Frequency Synthesizer Using Multi-Phase Injection-Locked Prescaler for Phase-Switching-Based Programmable Division With Automatic Injection-Lock Calibration in 45-nm CMOS.
IEEE Trans. Circuits Syst. II Express Briefs, 2019
Taking Compressive Sensing to the Hardware Level: Breaking Fundamental Radio-Frequency Hardware Performance Tradeoffs.
IEEE Signal Process. Mag., 2019
Sub-nW Wake-Up Receivers With Gate-Biased Self-Mixers and Time-Encoded Signal Processing.
IEEE J. Solid State Circuits, 2019
A Wake-Up Receiver With a Multi-Stage Self-Mixer and With Enhanced Sensitivity When Using an Interferer as Local Oscillator.
IEEE J. Solid State Circuits, 2019
A Flexible Phased-Array Architecture for Reception and Rapid Direction-of-Arrival Finding Utilizing Pseudo-Random Antenna Weight Modulation and Compressive Sampling.
IEEE J. Solid State Circuits, 2019
IEEE Internet Things J., 2019
Proceedings of the IEEE International Solid- State Circuits Conference, 2019
2018
<i>In~Situ</i> and In-Field Technique for Monitoring and Decelerating NBTI in 6T-SRAM Register Files.
IEEE Trans. Very Large Scale Integr. Syst., 2018
How to Make Analog-to-Information Converters Work in Dynamic Spectrum Environments With Changing Sparsity Conditions.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018
IEEE J. Solid State Circuits, 2018
IEEE J. Solid State Circuits, 2018
A Low-Jitter Ring-Oscillator Phase-Locked Loop Using Feedforward Noise Cancellation With a Sub-Sampling Phase Detector.
IEEE J. Solid State Circuits, 2018
An Area-Efficient Microprocessor-Based SoC With an Instruction-Cache Transformable to an Ambient Temperature Sensor and a Physically Unclonable Function.
IEEE J. Solid State Circuits, 2018
A Reconfigurable Architecture Using a Flexible LO Modulator to Unify High-Sensitivity Signal Reception and Compressed-Sampling Wideband Signal Detection.
IEEE J. Solid State Circuits, 2018
Proceedings of the 2018 IEEE Vehicular Networking Conference, 2018
Using VCO-OTA TIAs to Break the Gain, Linearity and Power Consumption Trade-offs in Passive Mixer based Direct-Conversion Receivers.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
An On-Chip Static and Dynamic DAC Error Correction Technique for High Speed Multibit Delta-Sigma Modulators.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Recent advances in in-situ and in-field aging monitoring and compensation for integrated circuits: Invited paper.
Proceedings of the IEEE International Reliability Physics Symposium, 2018
Demo Abstract: An Ultra-Low-Power Custom Integrated Circuit Based Sound-Source Localization System.
Proceedings of the 2018 IEEE/ACM Third International Conference on Internet-of-Things Design and Implementation, 2018
Proceedings of the 2018 IEEE/ACM Third International Conference on Internet-of-Things Design and Implementation, 2018
Efficient Model-Free Learning to Overcome Hardware Nonidealities in Analog-to-Information Converters.
Proceedings of the 2018 IEEE International Conference on Acoustics, 2018
A 19Gb/s RX for VSR-C2C Links with Clock-Less DFE and High-BW CDR Based on Master-Slave ILOs in 14nm CMOS.
Proceedings of the 44th IEEE European Solid State Circuits Conference, 2018
A -236.3dB FoM sub-sampling low-jitter supply-robust ring-oscillator PLL for clocking applications with feed-forward noise-cancellation.
Proceedings of the 2018 IEEE Custom Integrated Circuits Conference, 2018
A 0.008mm<sup>2</sup> 2.4GHz type-I sub-sampling ring-oscillator-based phase-locked loop with a -239.7dB FoM and -64dBc reference spurs.
Proceedings of the 2018 IEEE Custom Integrated Circuits Conference, 2018
A 78.2nW 3-channel time-delay-to-digital converter using polarity coincidence for audio-based object localization.
Proceedings of the 2018 IEEE Custom Integrated Circuits Conference, 2018
2017
FPGA with Improved Routability and Robustness in 130nm CMOS with Open-Source CAD Targetability.
CoRR, 2017
Theory and Design of a Direct Space-to-Information Converter for Rapid Detection of Interferer DoA.
Proceedings of the 86th IEEE Vehicular Technology Conference, 2017
Compact and voltage-scalable sensor for accurate thermal sensing in dynamic thermal management.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
An area-efficient microcontroller with an instruction-cache transformable to an ambient temperature sensor and a physically unclonable function.
Proceedings of the 2017 IEEE Custom Integrated Circuits Conference, 2017
An ultra-low-power wake-up receiver with voltage-multiplying self-mixer and interferer-enhanced sensitivity.
Proceedings of the 2017 IEEE Custom Integrated Circuits Conference, 2017
2016
Frequency-Translational Quadrature-Hybrid Receivers for Very-Low-Noise, Frequency-Agile, Scalable Inter-Band Carrier Aggregation.
IEEE J. Solid State Circuits, 2016
IEEE J. Solid State Circuits, 2016
A chopping switched-capacitor RF receiver with integrated blocker detection, +31dBm OB-IIP3, and +15dBm OB-B1dB.
Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016
SEUS: A Wearable Multi-Channel Acoustic Headset Platform to Improve Pedestrian Safety: Demo Abstract.
Proceedings of the 14th ACM Conference on Embedded Network Sensor Systems, SenSys 2016, 2016
9.3 A very-low-noise frequency-translational quadrature-hybrid receiver for carrier aggregation.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
A 4th-order analog continuous-time filter designed using standard cells and automatic digital logic design tools.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
Charge pump optimization and output spur reduction in VCO-based OTAs for active-RC analog filters.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
3.7μW 0.8V VCO-integrator-based high-efficiency capacitor-free low-dropout voltage regulator.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
Register file circuits and post-deployment framework to monitor aging effects in field.
Proceedings of the ESSCIRC Conference 2016: 42<sup>nd</sup> European Solid-State Circuits Conference, 2016
Band-pass compressive sampling as an enabling technology for rapid wideband RF spectrum sensing.
Proceedings of the 50th Asilomar Conference on Signals, Systems and Computers, 2016
2015
ACM Trans. Sens. Networks, 2015
IEEE Trans. Circuits Syst. II Express Briefs, 2015
A Sub-Sampling-Assisted Phase-Frequency Detector for Low-Noise PLLs With Robust Operation Under Supply Interference.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015
Theory and Design of a Quadrature Analog-to-Information Converter for Energy-Efficient Wideband Spectrum Sensing.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015
Field-Programmable LNAs With Interferer-Reflecting Loop for Input Linearity Enhancement.
IEEE J. Solid State Circuits, 2015
Wideband Rapid Interferer Detector Exploiting Compressed Sampling With a Quadrature Analog-to-Information Converter.
IEEE J. Solid State Circuits, 2015
Compact and Supply-Voltage-Scalable Temperature Sensors for Dense On-Chip Thermal Monitoring.
IEEE J. Solid State Circuits, 2015
19.4 A 2.7-to-3.7GHz rapid interférer detector exploiting compressed sampling with a quadrature analog-to-information converter.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015
14.7 In-situ techniques for in-field sensing of NBTI degradation in an SRAM register file.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015
A field-programmable noise-canceling wideband receiver with high-linearity hybrid class-AB-C LNTAs.
Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015
Scaling analog circuits into deep nanoscale CMOS: Obstacles and ways to overcome them.
Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015
2014
Low-Noise Active Cancellation of Transmitter Leakage and Transmitter Noise in Broadband Wireless Receivers for FDD/Co-Existence.
IEEE J. Solid State Circuits, 2014
Switched-Mode Operational Amplifiers and Their Application to Continuous-Time Filters in Nanoscale CMOS.
IEEE J. Solid State Circuits, 2014
A Self-Duty-Cycled and Synchronized UWB Pulse-Radio Receiver SoC With Automatic Threshold-Recovery Based Demodulation.
IEEE J. Solid State Circuits, 2014
Current Reference Pre-Charging Techniques for Low-Power Zero-Crossing Pipeline-SAR ADCs.
IEEE J. Solid State Circuits, 2014
CoRR, 2014
RF channelizer architectures using Iterative Downconversion for concurrent or fast-switching spectrum analysis.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014
20.6 A blocker-resilient wideband receiver with low-noise active two-point cancellation of >0dBm TX leakage and TX noise in RX band for FDD/Co-existence.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014
16.4 0.6-to-1.0V 279μm<sup>2</sup>, 0.92μW temperature sensor with less than +3.2/-3.4°C error for on-chip dense thermal monitoring.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014
17.9 A 0.6V 70MHz 4<sup>th</sup>-order continuous-time Butterworth filter with 55.8dB SNR, 60dB THD at +2.8dBm output signal power.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014
A 40MHz 4th-order active-UGB-RC filter using VCO-based amplifiers with zero compensation.
Proceedings of the ESSCIRC 2014, 2014
Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014
2013
Proceedings of the Innovation and Technology in Computer Science Education conference 2013, 2013
A self-duty-cycled and synchronized UWB receiver SoC consuming 375pJ/b for -76.5dBm sensitivity at 2Mb/s.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013
Proceedings of the IEEE INFOCOM 2013, Turin, Italy, April 14-19, 2013, 2013
A low power zero-crossing pipeline-SAR ADC with on-chip dynamically loaded pre-charged reference.
Proceedings of the ESSCIRC 2013, 2013
A stackable switched-capacitor DC/DC converter IC for LED drivers with 90% efficiency.
Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013
2012
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012
2011
IEEE Trans. Circuits Syst. II Express Briefs, 2011
IEEE J. Solid State Circuits, 2011
IEEE J. Solid State Circuits, 2011
An Ultra-Wideband Impulse-Radio Transceiver Chipset Using Synchronized-OOK Modulation.
IEEE J. Solid State Circuits, 2011
An Ultra-Low Voltage, Low-Noise, High Linearity 900-MHz Receiver With Digitally Calibrated In-Band Feed-Forward Interferer Cancellation in 65-nm CMOS.
IEEE J. Solid State Circuits, 2011
Organic solar cell-equipped energy harvesting active networked tag (EnHANT) prototypes.
Proceedings of the 9th International Conference on Embedded Networked Sensor Systems, 2011
Proceedings of the 9th International Conference on Mobile Systems, 2011
A 2.2GHz PLL using a phase-frequency detector with an auxiliary sub-sampling phase detector for in-band noise suppression.
Proceedings of the 2011 IEEE Custom Integrated Circuits Conference, 2011
2010
IEEE Wirel. Commun., 2010
A Discrete-Time Digital-IF Interference-Robust Ultrawideband Pulse Radio Transceiver Architecture.
IEEE Trans. Circuits Syst. I Regul. Pap., 2010
A 0.6-V Zero-IF/Low-IF Receiver With Integrated Fractional-N Synthesizer for 2.4-GHz ISM-Band Applications.
IEEE J. Solid State Circuits, 2010
Proceedings of the Seventh Annual IEEE Communications Society Conference on Sensor, 2010
Proceedings of the IEEE International Solid-State Circuits Conference, 2010
A low-power low-noise direct-conversion front-end with digitally assisted IIP2 background self calibration.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010
An Ultra-Low-Power interference-robust IR-UWB transceiver chipset using self-synchronizing OOK modulation.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010
2009
Scaling LC Oscillators in Nanometer CMOS Technologies to a Smaller Area But With Constant Performance.
IEEE Trans. Circuits Syst. II Express Briefs, 2009
IEEE Trans. Circuits Syst. II Express Briefs, 2009
Special Issue on Circuits and Systems Solutions for Nanoscale CMOS Design Challenges.
IEEE Trans. Circuits Syst. II Express Briefs, 2009
IEEE J. Solid State Circuits, 2009
A 0.65-V 2.5-GHz Fractional-N Synthesizer With Two-Point 2-Mb/s GFSK Data Modulation.
IEEE J. Solid State Circuits, 2009
Design of a High Performance 2-GHz Direct-Conversion Front-End With a Single-Ended RF Input in 0.13 µm CMOS.
IEEE J. Solid State Circuits, 2009
Proceedings of the 15th Annual International Conference on Mobile Computing and Networking, 2009
2008
Wideband Signal Synthesis Using Interleaved Partial-Order Hold Current-Mode Digital-to-Analog Converters.
IEEE Trans. Circuits Syst. II Express Briefs, 2008
IEEE Trans. Circuits Syst. I Regul. Pap., 2008
IEEE J. Solid State Circuits, 2008
IEEE J. Solid State Circuits, 2008
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008
A 0.042-mm2 fully integrated analog PLL with stacked capacitor-inductor in 45nm CMOS.
Proceedings of the ESSCIRC 2008, 2008
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008
2007
An Ultra-Compact Differentially Tuned 6-GHz CMOS LC-VCO With Dynamic Common-Mode Feedback.
IEEE J. Solid State Circuits, 2007
Correction to "A 0.5-V 74-dB SNDR 25-kHz Continuous-Time Delta-Sigma Modulator With a Return-to-Open DAC".
IEEE J. Solid State Circuits, 2007
A 0.5-V 74-dB SNDR 25-kHz Continuous-Time Delta-Sigma Modulator With a Return-to-Open DAC.
IEEE J. Solid State Circuits, 2007
IEEE J. Solid State Circuits, 2007
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Proceedings of the 33rd European Solid-State Circuits Conference, 2007
Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007
Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007
2006
A Time-Domain Model for Predicting the Injection Locking Bandwidth of Nonharmonic Oscillators.
IEEE Trans. Circuits Syst. II Express Briefs, 2006
IEEE J. Solid State Circuits, 2006
IEEE J. Solid State Circuits, 2006
Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
A 0.5 V fully differential gate-input operational transconductance amplifier with intrinsic common-mode rejection.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
2005
IEEE J. Solid State Circuits, 2005
IEEE J. Solid State Circuits, 2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005
2004
Proceedings of the 33rd European Solid-State Circuits Conference, 2004
2002
IEEE J. Solid State Circuits, 2002
2000
IEEE J. Solid State Circuits, 2000
1997
1996
Int. J. Circuit Theory Appl., 1996
1995
A programmable analog cellular neural network CMOS chip for high speed image processing.
IEEE J. Solid State Circuits, March, 1995
1994
Analogue CMOS VLSI Implementation of Cellular Neural Networks with Continuously Programmable Templates.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994