Jayasree Dattagupta

According to our database1, Jayasree Dattagupta authored at least 12 papers between 1991 and 2004.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2004
Editorial.
Microprocess. Microsystems, 2004

2000
O(n) routing in rearrangeable networks.
J. Syst. Archit., 2000

1998
Ring-connected trees: a multipurpose VLSI architecture for parallel processing.
Microprocess. Microsystems, 1998

1996
Fault identification and routing in Benes networks.
J. Syst. Archit., 1996

Two-Pass Rearrangeability in Faulty Benes Networks.
J. Parallel Distributed Comput., 1996

1995
On synthesizing cube and tree for parallel processing.
Microprocess. Microprogramming, 1995

A fault location technique and alternate routing in Benes network.
Proceedings of the 4th Asian Test Symposium (ATS '95), 1995

1994
Hierarchical Classification of Permutation Classes in Multistage Interconnection Networks.
IEEE Trans. Computers, 1994

CCT: A New VLSI Architecture for Parallel Processing.
Proceedings of the Proceedings 1994 International Conference on Parallel and Distributed Systems, 1994

1993
Isomorphism of Conflict Graphs in Multistage Interconnection Networks and Its Application to Optimal Routing.
IEEE Trans. Computers, 1993

1992
A Versatile External Control Method for Self-Routable Permutations in Benes Network.
Proceedings of the 1992 International Conference on Parallel Processing, 1992

1991
On Self-Routable Permutations in Benes Network.
Proceedings of the International Conference on Parallel Processing, 1991


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