Jayatika Sakhuja

Orcid: 0000-0003-2453-4851

According to our database1, Jayatika Sakhuja authored at least 8 papers between 2020 and 2025.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2025
A Hardware-Software Co-Design Platform to Evaluate SNN Workloads for ReRAM-based IMC.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2025

A Neuromodulation-based Spiking Neural Network using ReRAM Array.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2025

2024
Impact of Memory Parameters on Sensitivity Margin of Analog-to-Digital Converter Limiting Neural Network Density.
Proceedings of the 22nd Non-Volatile Memory Technology Symposium, 2024

Area Efficient Multi-Memristor Bit Cell Design for Resistive Processing Unit-Based Neural Network Training.
Proceedings of the 22nd Non-Volatile Memory Technology Symposium, 2024

Device-Aware Quantization in Resistive Random Access Memory-Based Crossbar Arrays to Account for Device Non-Idealities.
Proceedings of the Device Research Conference, 2024

2023
Schottky Barrier MOSFET Enabled Ultra-Low Power Real-Time Neuron for Neuromorphic Computing.
CoRR, 2023

2021
Exploiting the Electrothermal Timescale in PrMnO3 RRAM for a compact, clock-less neuron exhibiting biological spiking patterns.
CoRR, 2021

2020
Thermal Engineering of Volatile Switching in PrMnO3 RRAM: Non-Linearity in DC IV Characteristics and Transient Switching Speed.
Proceedings of the 2020 Device Research Conference, 2020


  Loading...