Jayita Das

According to our database, Jayita Das authored at least 9 papers between 2011 and 2016.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2016

MRAM PUF: Using Geometric and Resistive Variations in MRAM Cells.

Jayita Das, Kevin Scott, Sanjukta Bhanja

ACM J. Emerg. Technol. Comput. Syst., 2016

Survey of Emerging Technology Based Physical Unclonable Funtions.

Ilia A. Bautista Adames, Jayita Das, Sanjukta Bhanja

Proceedings of the 26th edition on Great Lakes Symposium on VLSI, 2016

2014

STT-Based Non-Volatile Logic-in-Memory Framework.

Jayita Das, Syed M. Alam, Sanjukta Bhanja

Proceedings of the Field-Coupled Nanocomputing - Paradigms, Progress, and Perspectives, 2014

Auxiliary Roles in STT-MRAM Memory.

Jayita Das

PhD thesis, 2014

Nano Magnetic STT-Logic Partitioning for Optimum Performance.

Jayita Das, Syed M. Alam, Sanjukta Bhanja

IEEE Trans. Very Large Scale Integr. Syst., 2014

Energy Barrier Model of SRAM for Improved Energy and Error Rates.

Jayita Das, Swaroop Ghosh

IEEE Trans. Circuits Syst. I Regul. Pap., 2014

2012

Ultra-Low Power Hybrid CMOS-Magnetic Logic Architecture.

Jayita Das, Syed M. Alam, Sanjukta Bhanja

IEEE Trans. Circuits Syst. I Regul. Pap., 2012

Non-destructive variability tolerant differential read for non-volatile logic.

Jayita Das, Syed M. Alam, Sanjukta Bhanja

Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012

2011

Low Power Magnetic Quantum Cellular Automata Realization Using Magnetic Multi-Layer Structures.

Jayita Das, Syed M. Alam, Sanjukta Bhanja

IEEE J. Emerg. Sel. Topics Circuits Syst., 2011