Jeahack Lee

Orcid: 0009-0000-7085-2194

According to our database1, Jeahack Lee authored at least 11 papers between 2009 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2023
Area-Efficient Intellectual Property (IP) Design of Advanced Encryption Standard.
IEEE Trans. Circuits Syst. II Express Briefs, October, 2023

Hardware Architecture for Reducing Worst-Case Latency in Fast SCF Polar Decoders.
IEEE Access, 2023

Soft-Error Injection System for Processor on FPGA Platform.
Proceedings of the Fourteenth International Conference on Ubiquitous and Future Networks, 2023

2022
Implementing Binarized Neural Network Processor on FPGA-Based Platform.
Proceedings of the 4th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2022

2016
Low-Complexity First-Two-Minimum-Values Generator for Bit-Serial LDPC Decoding.
IEEE Trans. Circuits Syst. II Express Briefs, 2016

2015
Novel Shared Multiplier Scheduling Scheme for Area-Efficient FFT/IFFT Processors.
IEEE Trans. Very Large Scale Integr. Syst., 2015

2012
Low complexity FFT/IFFT processor for high-speed OFDM system using efficient multiplier scheduling.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

Phase recovery for QPSK transmission without using complex multipliers.
Proceedings of the 6th International Conference on Ubiquitous Information Management and Communication, 2012

2011
High-speed and low complexity carrier recovery for DP-QPSK transmission.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

Low complexity soft-decision demapper for DVB-S2 using phase selection method.
Proceedings of the 5th International Conference on Ubiquitous Information Management and Communication, 2011

2009
Efficient Synchronizer Architecture using Common Autocorrelator for DVB-S2.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009


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