Jérôme Ermont

Proceedings of the 18th IEEE International Conference on Factory Communication Systems, 2022

2020

Efficient configuration of a QoS-aware AFDX network with Deficit Round Robin.

[BibT_eX]

[DOI]

Aakash Soni

Proceedings of the 18th IEEE International Conference on Industrial Informatics, 2020

Impact of frame size and deadlines on WRR scheduling in a switched Ethernet network with critical and non-critical flows.

[BibT_eX]

[DOI]

Aakash Soni

Proceedings of the 25th IEEE International Conference on Emerging Technologies and Factory Automation, 2020

2019

Quantum assignment for QoS-aware AFDX network with deficit round robin.

[BibT_eX]

[DOI]

Aakash Soni

Proceedings of the 27th International Conference on Real-Time Networks and Systems, 2019

Limiting over sampling to improve transmission schedulability in a mixed NoC/AFDX architecture.

[BibT_eX]

[DOI]

Sandrine Mouysset

Proceedings of the 24th IEEE International Conference on Emerging Technologies and Factory Automation, 2019

2018

Reducing AFDX jitter in a mixed NoC/AFDX architecture.

[BibT_eX]

[DOI]

Proceedings of the 14th IEEE International Workshop on Factory Communication Systems, 2018

Message scheduling to reduce AFDX jitter in a mixed NoC/AFDX architecture.

[BibT_eX]

[DOI]

Proceedings of the 26th International Conference on Real-Time Networks and Systems, 2018

2017

Extended recursive analysis for tilera tile64 NoC architectures: towards inter-NoC delay analysis.

[BibT_eX]

[DOI]

SIGBED Rev., 2017

Towards a mixed NoC/AFDX architecture for avionics applications.

[BibT_eX]

[DOI]

Proceedings of the IEEE 13th International Workshop on Factory Communication Systems, 2017

2016

Towards a unified approach for worst-case analysis of Tilera-like and KalRay-like NoC architectures.

[BibT_eX]

[DOI]

Proceedings of the IEEE World Conference on Factory Communication Systems, 2016

Poster Abstract: I/O Contention Aware Mapping of Multi-Criticalities Real-Time Applications over Many-Core Architectures.

[BibT_eX]

[DOI]

Proceedings of the 2016 IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS), 2016

Reducing the Contention Experienced by Real-Time Core-to-I/O Flows over a Tilera-Like Network on Chip.

[BibT_eX]

[DOI]

Proceedings of the 28th Euromicro Conference on Real-Time Systems, 2016

2015

Wormhole networks properties and their use for optimizing worst case delay analysis of many-cores.

[BibT_eX]

[DOI]

Proceedings of the 10th IEEE International Symposium on Industrial Embedded Systems, 2015

2014

End-to-end latency and temporal consistency analysis in networked real-time systems.

[BibT_eX]

[DOI]

Int. J. Crit. Comput. Based Syst., 2014

2013

Freshness and Reactivity Analysis in Globally Asynchronous Locally Time-Triggered Systems.

[BibT_eX]

[DOI]

Proceedings of the NASA Formal Methods, 2013

Modeling a spacewire architecture using timed automata to compute worst-case end-to-end delays.

[BibT_eX]

[DOI]

Christian Fraboul

Proceedings of 2013 IEEE 18th Conference on Emerging Technologies & Factory Automation, 2013

2012

An improved timed automata approach for computing exact worst-case delays of AFDX sporadic flows.

[BibT_eX]

[DOI]

Proceedings of 2012 IEEE 17th International Conference on Emerging Technologies & Factory Automation, 2012

2011

Worst Case Temporal Consistency in Integrated Modular Avionics Systems.

[BibT_eX]

[DOI]

Proceedings of the 13th IEEE International Symposium on High-Assurance Systems Engineering, 2011

Latency and freshness analysis on IMA systems.

[BibT_eX]

[DOI]

Proceedings of the IEEE 16th Conference on Emerging Technologies & Factory Automation, 2011

2010

Analyzing End-to-End Functional Delays on an IMA Platform.

[BibT_eX]

[DOI]

Proceedings of the Leveraging Applications of Formal Methods, Verification, and Validation, 2010

Model for worst case delay analysis of an AFDX network using timed automata.

[BibT_eX]

[DOI]

Proceedings of 15th IEEE International Conference on Emerging Technologies and Factory Automation, 2010

2009

Verification of real-time systems with preemption: negative and positive results.

[BibT_eX]

[DOI]

Claire Pagetti

Innov. Syst. Softw. Eng., 2009

2007

Verification of embbeded systems with preemption: a negative result.

[BibT_eX]

[DOI]

Proceedings of the ISoLA 2007, 2007

2006

Methods for bounding end-to-end delays on an AFDX network.

[BibT_eX]

[DOI]

Proceedings of the 18th Euromicro Conference on Real-Time Systems, 2006

2005

TTCAN over mixed CAN/switched Ethernet architecture.

[BibT_eX]

[DOI]

Proceedings of 10th IEEE International Conference on Emerging Technologies and Factory Automation, 2005

2003

Trois approches pour la modélisation et la vérification de systèmes embarqués.

[BibT_eX]

[DOI]

Gérard Bel

Tech. Sci. Informatiques, 2003

2002

TPAP: an Algebra of Preemptive Processes for Verifying Real-Time Systems with Shared Resources.

[BibT_eX]

[DOI]