Jesse Elwell

Orcid: 0000-0001-6679-1624

According to our database1, Jesse Elwell authored at least 16 papers between 2010 and 2023.

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Bibliography

2023
Secure NDN Packet Encapsulation.
Proceedings of the IEEE International Conference on Communications, 2023

Investigating the Synergy between Routing and Forwarding Strategy in NDN Networks.
Proceedings of the 10th ACM Conference on Information-Centric Networking, 2023

2021
Computing with time: microarchitectural weird machines.
Proceedings of the ASPLOS '21: 26th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2021

2020
Generalized Insider Attack Detection Implementation using NetFlow Data.
CoRR, 2020

2018
Flexible Hardware-Managed Isolated Execution: Architecture, Software Support and Applications.
IEEE Trans. Dependable Secur. Comput., 2018

Runtime Attestation for IAAS Clouds.
Proceedings of the 8th International Conference on Cloud Computing and Services Science, 2018

2017
Hardening extended memory access control schemes with self-verified address spaces.
Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017

RIC: Relaxed Inclusion Caches for Mitigating LLC Side-Channel Attacks.
Proceedings of the 54th Annual Design Automation Conference, 2017

ROP Defense in the Cloud through LIve Text Page-level Re-ordering - The LITPR System.
Proceedings of the CLOSER 2017, 2017

On the Detection of Kernel-Level Rootkits Using Hardware Performance Counters.
Proceedings of the 2017 ACM on Asia Conference on Computer and Communications Security, 2017

2016
Rethinking Memory Permissions for Protection Against Cross-Layer Attacks.
ACM Trans. Archit. Code Optim., 2016

2014
Iso-X: A Flexible Architecture for Hardware-Managed Isolated Execution.
Proceedings of the 47th Annual IEEE/ACM International Symposium on Microarchitecture, 2014

A Non-Inclusive Memory Permissions architecture for protection against cross-layer attacks.
Proceedings of the 20th IEEE International Symposium on High Performance Computer Architecture, 2014

2011
TPM-SIM: a framework for performance evaluation of trusted platform modules.
Proceedings of the 48th Design Automation Conference, 2011

Mathematical limits of parallel computation for embedded systems.
Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011

2010
A co-processor approach for accelerating data-structure intensive algorithms.
Proceedings of the 28th International Conference on Computer Design, 2010


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