Ji-Jon Sit

Orcid: 0000-0002-2723-0856

According to our database1, Ji-Jon Sit authored at least 12 papers between 2003 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2021
An Injection-Locked Wireless Power Transfer Transmitter With Automatic Maximum Efficiency Tracking.
IEEE Trans. Ind. Electron., 2021

A RF-DC Rectifier with Dual Voltage Polarity Self-Biasing for Wireless Sensor Node Application.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

2018
Injection-Locked Power Oscillator for Resonance Frequency Tracking in Wireless Power Transfer.
Proceedings of the 2018 IEEE Biomedical Circuits and Systems Conference, 2018

2008
A Cochlear-Implant Processor for Encoding Music and Lowering Stimulation Power.
IEEE Pervasive Comput., 2008

2007
An asynchronous,low-power architecture for interleaved neural stimulation, using envelope and phase information.
PhD thesis, 2007

A Low-Power Asynchronous Interleaved Sampling Algorithm for Cochlear Implants That Encodes Envelope and Phase Information.
IEEE Trans. Biomed. Eng., 2007

A Low-Power Blocking-Capacitor-Free Charge-Balanced Electrode-Stimulator Chip With Less Than 6 nA DC Error for 1-mA Full-Scale Stimulation.
IEEE Trans. Biomed. Circuits Syst., 2007

2005
An ultra-low-power programmable analog bionic ear processor.
IEEE Trans. Biomed. Eng., 2005

Biasing techniques for subthreshold MOS resistive grids.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2004
A micropower logarithmic A/D with offset and temperature compensation.
IEEE J. Solid State Circuits, 2004

2003
A micropower analog VLSI processing channel for bionic ears and speech-recognition front ends.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

A 16-channel analog VLSI processor for bionic ears and speech-recognition front ends.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2003


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