Liter Siek

According to our database1, Liter Siek authored at least 76 papers between 2000 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2021
Low Voltage Low Power Output Programmable OCL-LDO with Embedded Voltage Reference.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

A RF-DC Rectifier with Dual Voltage Polarity Self-Biasing for Wireless Sensor Node Application.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

2020
Deep Neural Network (DNN) Optimized Design of 2.45 GHz CMOS Rectifier With 73.6% Peak Efficiency for RF Energy Harvesting.
IEEE Trans. Circuits Syst., 2020

A 10-bit 3.75-GS/s Binary-Weighted DAC with 58.6-pJ Energy Consumption in 65-nm CMOS.
Proceedings of the IEEE Nordic Circuits and Systems Conference, NorCAS 2020, Oslo, 2020

2019
Multiloop Control for Fast Transient DC-DC Converter.
IEEE Trans. Very Large Scale Integr. Syst., 2019

A Single-Stage Dual-Output Tri-Mode AC-DC Regulator for Inductively Powered Application.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

A Low-Noise, Positive-Input, Negative-Output Voltage Generator for Low-to-Moderate Driving Capacity Applications.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

A TDC-less all-digital phase locked loop for medical implant applications.
Microprocess. Microsystems, 2019

A 0.6 V, 1.74 ps Resolution Capacitively Boosted Time-to-Digital Converter in 180 nm CMOS.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

2018
A 16-mW 1-GS/s With 49.6-dB SNDR TI-SAR ADC for Software-Defined Radio in 65-nm CMOS.
IEEE Trans. Very Large Scale Integr. Syst., 2018

A Single-Stage Direct-Conversion AC-DC Converter for Inductively Powered Application.
IEEE Trans. Very Large Scale Integr. Syst., 2018

A 0.058 mm<sup>2</sup>, 24µW Temperature Sensor in 40nm CMOS Process with ± 0.5, °C Inaccuracy from -55 to 175°C.
Circuits Syst. Signal Process., 2018

An 87% Peak Efficiency, 37W, Class H Audio Amplifier with GaN Output Stage.
Proceedings of the 2018 IEEE Nordic Circuits and Systems Conference, 2018

A 0.0186 mm<sup>2</sup>, 0.65 V Supply, 9.53 ps RMS Jitter All-Digital PLL for Medical Implants.
Proceedings of the 2018 IEEE Nordic Circuits and Systems Conference, 2018

A Fast Transient Response DC-DC Converter with an Active Compensation Capacitor Module.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

A 14-b, 850fs Fully Synthesizable Stochastic-Based Branching Time-to-Digital Converter in 65nm CMOS.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Novel Edge Comparator with Input Time Hysteresis for Improved Edges Arbitration.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

2017
An 80.4% Peak Power Efficiency Adaptive Supply Class H Power Amplifier for Audio Applications.
IEEE Trans. Very Large Scale Integr. Syst., 2017

A Hysteretic Switched-Capacitor DC-DC Converter With Optimal Output Ripple and Fast Transient Response.
IEEE Trans. Very Large Scale Integr. Syst., 2017

A High-Efficiency 6.78-MHz Full Active Rectifier With Adaptive Time Delay Control for Wireless Power Transmission.
IEEE Trans. Very Large Scale Integr. Syst., 2017

A transient-enhanced low dropout regulator with rail to rail dynamic impedance attenuation buffer suitable for commercial design.
Microelectron. J., 2017

A 0.9-V input PWM DCM boost converter with low output ripples and fast load transient response based on a novel square-root voltage mode (SRVM) control approach.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

2016
Asymmetrical Dead-Time Control Driver for Buck Regulator.
IEEE Trans. Very Large Scale Integr. Syst., 2016

A Flexible-Weighted Nonbinary Searching Technique for High-Speed SAR-ADCs.
IEEE Trans. Very Large Scale Integr. Syst., 2016

A 1 V 103 dB 3rd-Order Audio Continuous-Time ΔΣ ADC With Enhanced Noise Shaping in 65 nm CMOS.
IEEE J. Solid State Circuits, 2016

High-Accuracy Time-Mode Duty-Cycle-Modulation-Based Temperature Sensor for Energy-Efficient System Applications.
Circuits Syst. Signal Process., 2016

A Filter Bank Mismatch Calibration Technique for Frequency-Interleaved ADCs.
Circuits Syst. Signal Process., 2016

Multichannel Time Skew Calibration for Time-Interleaved ADCs Using Clock Signal.
Circuits Syst. Signal Process., 2016

A high efficiency synchronous buck converter with adaptive dead-time control.
Proceedings of the International Symposium on Integrated Circuits, 2016

A continuous switching mode step-down switched-capacitor regulator with inrush current control scheme.
Proceedings of the International Symposium on Integrated Circuits, 2016

A switched-capacitor DC-DC converter with embedded fast NMOS-LDOs achieving low noise, low output voltage ripple and fast response.
Proceedings of the International Symposium on Integrated Circuits, 2016

Review of pulse generators for gated ring oscillator based Time-to-Digital converters.
Proceedings of the International Symposium on Integrated Circuits, 2016

Electronically tunable MOSFET-based resistor used in a variable gain amplifier or filter.
Proceedings of the International Symposium on Integrated Circuits, 2016

Performance analysis on active rectifier structures for inductively powered application.
Proceedings of the International Symposium on Integrated Circuits, 2016

A dual redundancy radiation-hardened Flip-Flop based on C-element in 65nm process.
Proceedings of the International Symposium on Integrated Circuits, 2016

Digitally-controlled H-bridge DC-DC converter for micropower PV energy harvesting system.
Proceedings of the International Symposium on Integrated Circuits, 2016

A close-loop time-mode temperature sensor with inaccuracy of -0.6°C/0.5°C from -40°C to 120°C.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

A 10-bit 1GS/s 4-way TI SAR ADC with tap-interpolated FIR filter based time skew calibration.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2016

A 9-bit, 1.08ps resolution two-step time-to-digital converter in 65 nm CMOS for time-mode ADC.
Proceedings of the 2016 IEEE Asia Pacific Conference on Circuits and Systems, 2016

2015
An Area-Efficient Current-Mode Bandgap Reference With Intrinsic Robust Start-Up Behavior.
IEEE Trans. Circuits Syst. II Express Briefs, 2015

A 400 nW Single-Inductor Dual-Input-Tri-Output DC-DC Buck-Boost Converter With Maximum Power Point Tracking for Indoor Photovoltaic Energy Harvesting.
IEEE J. Solid State Circuits, 2015

A New Time-Mode On-Chip Oscillator-Based High Linearity and Low Power Temperature Sensor.
J. Circuits Syst. Comput., 2015

A high efficiency rectifier for inductively power transfer application.
Proceedings of the 2015 IFIP/IEEE International Conference on Very Large Scale Integration, 2015

A digital time skew calibration technique for time-interleaved ADCs.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

A higher order curvature corrected 2 ppm/°C CMOS voltage reference circuit.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

A 9-bit body-biased vernier ring time-to-digital converter in 65 nm CMOS technology.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

A switched capacitor deadtime controller for DC-DC buck converter.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Design of WPT coils to minimize AC resistance and capacitor stress applied to SS-topology.
Proceedings of the IECON 2015, 2015

A low TC, supply independent and process compensated current reference.
Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015

2014
A 5.8 nW 9.1-ENOB 1-kS/s Local Asynchronous Successive Approximation Register ADC for Implantable Medical Device.
IEEE Trans. Very Large Scale Integr. Syst., 2014

A 0.42-V Input Boost dc-dc Converter With Pseudo-Digital Pulsewidth Modulation.
IEEE Trans. Circuits Syst. II Express Briefs, 2014

A 1.33 µW 8.02-ENOB 100 kS/s Successive Approximation ADC With Supply Reduction Technique for Implantable Retinal Prosthesis.
IEEE Trans. Biomed. Circuits Syst., 2014

A 0.7 V low-power fully programmable Gaussian function generator for brain-inspired Gaussian correlation associative memory.
Neurocomputing, 2014

High accuracy time-mode duty-cycle-modulation-based temperature sensor for energy efficient system applications.
Proceedings of the 2014 International Symposium on Integrated Circuits (ISIC), 2014

Triple boundary multiphase with predictive interleaving technique for switched capacitor DC-DC converter regulation.
Proceedings of the 2014 International Symposium on Integrated Circuits (ISIC), 2014

A Fixed-frequency hysteretic controlled buck DC-DC converter with improved load regulation.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

A statistic based time skew calibration method for time-interleaved ADCs.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

2013
A 400nW single-inductor dual-input-tri-output DC-DC buck-boost converter with maximum power point tracking for indoor photovoltaic energy harvesting.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

Analysis and design of high performance frequency-interleaved ADC.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

2012
A Novel Ultra-Low Power Two-Terminal Zener voltage Reference.
J. Circuits Syst. Comput., 2012

A novel analog-to-residue converter for biomedical DSP application.
Proceedings of the International SoC Design Conference, 2012

A novel analog-to-residue conversion scheme based on clock overlapping technique.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

An ultra-compact green bio-regulator dedicated for brain cortical implant using a dynamic PSR enhancement technique.
Proceedings of the Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2012

A compact 16-bit dual-slope integrating circuit for direct analog-to-residue conversion.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2012

A fully digital green LDO regulator dedicated for biomedical implant using a power-aware binary switching technique.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2012

2010
Analog-to-Digital Converter with energy recovery capability using adiabatic technique.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010

A simplified approach for baseband recovery in SDR architectures.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010

A high speed tracking quantizer for Continuous-Time multi-bit sigma delta modulators.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010

2009
A Low-Noise Multi-GHz CMOS Multiloop Ring Oscillator With Coarse and Fine Frequency Tuning.
IEEE Trans. Very Large Scale Integr. Syst., 2009

A Compact Current Mode Neuron Circuit with Gaussian Taper Learning Capability.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

2007
A spur-reduction technique in a fully integrated CMOS frequency synthesizer for 5-GHz WLAN SOC.
Proceedings of the 2007 IEEE International SOC Conference, 2007

A two-step dynamic reference A/D converter.
Proceedings of the 18th European Conference on Circuit Theory and Design, 2007

2005
1.8-V 10-GHZ ring VCO design using 0.18-μm CMOS technology.
Proceedings of the Proceedings 2005 IEEE International SOC Conference, 2005

A new 4.3 ppm/°C voltage reference using standard CMOS process with 1V supply voltage.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

A 0.18-µm 10-GHz CMOS ring oscillator for optical transceivers.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2000
A low-offset class-AB CMOS operational amplifier.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000


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