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Jiaqi Ouyang

According to our database1, Jiaqi Ouyang authored at least 3 papers between 2024 and 2026.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2026
A High-Precision CORDIC Architecture with Reduced-Convergence Preprocessing and Dynamic Logarithmic Bit-Width Scaling.
[BibTeX]
[DOI]
Zhentao Zheng
,
Wei Zhang
,
Jiaqi Ouyang
,
Qifan Wang
,
Lei Chen
,
Fengwei An
Proceedings of the IEEE International Symposium on Circuits and Systems, 2026

2025
Dual-Thread Deflate/Inflate Accelerator With Multicheckpoint Control With High Throughput and Compression Ratio for Bandwidth-Efficient Systems.
[BibTeX]
[DOI]
Wei Zhang
,
Yiwei Luo
,
Xianglong Wang
,
Jiaqi Ouyang
,
Lei Chen
,
Fengwei An
IEEE Trans. Very Large Scale Integr. Syst., October, 2025

2024
A 43.3 bit/cycle Inflate Accelerator Featuring Static-Dynamic Huffman Decoder with Multiple Checkpoints and Optimized End-Of-Block Control for Hyperscale data.
[BibTeX]
[DOI]
Wei Zhang
,
Yiwei Luo
,
Yangyi Zhang
,
Jiaqi Ouyang
,
Guodong Wang
,
Xianglong Wang
,
Gang Shi
,
Lei Chen
,
Fengwei An
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2024


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