Jirí Bucek

SN Comput. Sci., 2024

2023

SPA Attack on NTRU Protected Implementation with Sparse Representation of Private Key.

[BibT_eX]

[DOI]

Proceedings of the 9th International Conference on Information Systems Security and Privacy, 2023

Single-Trace Attack on NTRU Decryption with Machine Learning and Template Profiling.

[BibT_eX]

[DOI]

Proceedings of the 26th Euromicro Conference on Digital System Design, 2023

2022

Three counter value based ROPUFs on FPGA and their properties.

[BibT_eX]

[DOI]

Filip Kodýtek

Microprocess. Microsystems, February, 2022

Verification of PUF-based IoT Protocols with AVISPA and Scyther.

[BibT_eX]

[DOI]

Proceedings of the 19th International Conference on Security and Cryptography, 2022

2020

Symmetric and Asymmetric Schemes for Lightweight Secure Communication.

[BibT_eX]

[DOI]

Proceedings of the Information Systems Security and Privacy - 6th International Conference, 2020

Lightweight Authentication and Secure Communication Suitable for IoT Devices.

[BibT_eX]

[DOI]

Proceedings of the 6th International Conference on Information Systems Security and Privacy, 2020

Comparison of three counter value based ROPUFs on FPGA.

[BibT_eX]

[DOI]

Filip Kodýtek

Proceedings of the 23rd Euromicro Conference on Digital System Design, 2020

2019

Side-Channel Attack on the A5/1 Stream Cipher.

[BibT_eX]

[DOI]

Martin Jurecek

Proceedings of the 22nd Euromicro Conference on Digital System Design, 2019

2017

Design of a Residue Number System Based Linear System Solver in Hardware.

[BibT_eX]

[DOI]

J. Signal Process. Syst., 2017

True random number generator based on ring oscillator PUF circuit.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 2017

2016

Improved ring oscillator PUF on FPGA and its properties.

[BibT_eX]

[DOI]

Filip Kodýtek

Microprocess. Microsystems, 2016

Polynomial Based NUC Implemented on FPGA.

[BibT_eX]

[DOI]

Martin Rozkovec

Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016

Temperature Dependence of ROPUF on FPGA.

[BibT_eX]

[DOI]

Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016

True Random Number Generator Based on ROPUF Circuit.

[BibT_eX]

[DOI]

Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016

2014

System on chip design of a linear system solver.

[BibT_eX]

[DOI]

Proceedings of the 2014 International Symposium on System-on-Chip, 2014

An ASIC linear congruence solver synthesized with three cell libraries.

[BibT_eX]

[DOI]

Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014

2013

Differential Power Analysis under Constrained Budget: Low Cost Education of Hackers.

[BibT_eX]

[DOI]

Filip Stepánek

Martin Novotný

Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013

Comparison of FPGA and ASIC Implementation of a Linear Congruence Solver.

[BibT_eX]

[DOI]

Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013

2012

Dedicated hardware implementation of a linear congruence solver in FPGA.

[BibT_eX]

[DOI]

Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012

2006

Comparing Subtraction-Free and Traditional AMI.

[BibT_eX]

[DOI]