Pavel Kubalík

According to our database1, Pavel Kubalík authored at least 24 papers between 2005 and 2020.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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PhD thesis 
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Bibliography

2020
An In-Sight Into How Compression Dictionary Architecture Can Affect the Overall Performance in FPGAs.
IEEE Access, 2020

Low Power Wireless Data Transfer for Internet of Things: GSM Network Measuring Results.
Proceedings of the 9th Mediterranean Conference on Embedded Computing, 2020

2019
High Throughput and Low Latency LZ4 Compressor on FPGA.
Proceedings of the 2019 International Conference on ReConFigurable Computing and FPGAs, 2019

Ultra High Resolution Jitter Measurement Method for Ethernet Based Networks.
Proceedings of the IEEE 9th Annual Computing and Communication Workshop and Conference, 2019

Design of a High-Throughput Match Search Unit for Lossless Compression Algorithms.
Proceedings of the IEEE 9th Annual Computing and Communication Workshop and Conference, 2019

2018
Performance Comparison of Multiple Approaches of Status Register for Medium Density Memory Suitable for Implementation of a Lossless Compression Dictionary: (Abstract Only).
Proceedings of the 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2018

2017
Design of a Residue Number System Based Linear System Solver in Hardware.
J. Signal Process. Syst., 2017

2016
A novel and efficient method to initialize FPGA embedded memory content in asymptotically constant time.
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2016

2015
LZ4 compression algorithm on FPGA.
Proceedings of the 2015 IEEE International Conference on Electronics, 2015

2014
System on chip design of a linear system solver.
Proceedings of the 2014 International Symposium on System-on-Chip, 2014

An ASIC linear congruence solver synthesized with three cell libraries.
Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014

2013
Comparison of FPGA and ASIC Implementation of a Linear Congruence Solver.
Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013

2012
Dedicated hardware implementation of a linear congruence solver in FPGA.
Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012

2011
Fault Models Usability Study for On-line Tested FPGA.
Proceedings of the 14th Euromicro Conference on Digital System Design, 2011

2010
Faults Coverage Improvement Based on Fault Simulation and Partial Duplication.
Proceedings of the 13th Euromicro Conference on Digital System Design, 2010

2009
Reliable Railway Station System Based on Regular Structure Implemented in FPGA.
Proceedings of the 12th Euromicro Conference on Digital System Design, 2009

2008
Dependable design technique for system-on-chip.
J. Syst. Archit., 2008

Experimental SEU Impact on Digital Design Implemented in FPGAs.
Proceedings of the 11th Euromicro Conference on Digital System Design: Architectures, 2008

An Efficient Multiple-Parity Generator Design for On-Line Testing on FPGA.
Proceedings of the 11th Euromicro Conference on Digital System Design: Architectures, 2008

2007
Fault Injection and Simulation for Fault Tolerant Reconfigurable Duplex System.
Proceedings of the 10th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2007), 2007

2006
Fault Tolerant System Design Method Based on Self-Checking Circuits.
Proceedings of the 12th IEEE International On-Line Testing Symposium (IOLTS 2006), 2006

Dependable Design for FPGA Based on Duplex System and Reconfiguration.
Proceedings of the Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August, 2006

Dependability Computation for Fault Tolerant Reconfigurable Duplex System.
Proceedings of the 9th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2006), 2006

2005
Dependability computations for fault-tolerant system based on FPGA.
Proceedings of the 12th IEEE International Conference on Electronics, 2005


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