Jiyang Kang

According to our database1, Jiyang Kang authored at least 4 papers between 1997 and 2001.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2001
A Compiler-Friendly RISC-Based Digital Signal Processor Synthesis and Performance Evaluation.
J. VLSI Signal Process., 2001

A block priority based instruction caching scheme for multimedia processors.
Proceedings of the IEEE International Conference on Acoustics, 2001

1999
A floating-point to integer C converter with shift reduction for fixed-point digital signal processors.
Proceedings of the 1999 IEEE International Conference on Acoustics, 1999

1997
Fixed-point C compiler for TMS320C50 digital signal processor.
Proceedings of the 1997 IEEE International Conference on Acoustics, 1997


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