Jon S. Duster

According to our database1, Jon S. Duster authored at least 10 papers between 2003 and 2005.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2005
An 18 GHz low noise high linearity active mixer in SiGe.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Design of an ultra-wideband low noise amplifier in 0.13µm CMOS.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

A 1.5 V, 5 MW current mode analog baseband processor IC for wideband wireless systems.
Proceedings of the Third IASTED International Conference on Circuits, 2005

Full-rate injection-locked 10.3Gb/s clock and data recovery circuit in a 45GHz-f<sub>T</sub> SiGe process.
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

2004
A 25-GHz emitter degenerated LC VCO.
IEEE J. Solid State Circuits, 2004

A comparative study of MOS VCOs for low voltage high performance operation.
Proceedings of the 2004 International Symposium on Low Power Electronics and Design, 2004

A 1.5V class A 5<sup>th</sup> order log domain filter in SiGe technology.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

A low power 60 DB control range programmable gain amplifier in sige technology.
Proceedings of the Second IASTED International Conference on Circuits, 2004

A 18.7 dB gain, 2.0 dB noise figure low-noise amplifier in SiGe technology for various 2.4 GHz applications.
Proceedings of the Second IASTED International Conference on Circuits, 2004

2003
Analysis of emitter degenerated LC oscillators using bipolar technologies.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003


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