Joy Laskar

According to our database1, Joy Laskar authored at least 45 papers between 2003 and 2017.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Awards

IEEE Fellow

IEEE Fellow 2005, "For contributions to the modeling and development of high frequency communication modules.".

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2017
Complete CMOS mmW links for consumer volume and cost structure.
Proceedings of the 2017 IEEE Radio and Wireless Symposium, 2017

2016
A Multilevel Class-D CMOS Power Amplifier for an Out-Phasing Transmitter With a Nonisolated Power Combiner.
IEEE Trans. Circuits Syst. II Express Briefs, 2016

2014
Optimization of CMOS power-cell layout for improving junction breakdown.
IEICE Electron. Express, 2014

2013
50th Anniversary of the Light-Emitting Diode (LED): An Ultimate Lamp [Scanning the Issue].
Proc. IEEE, 2013

2011
A Low Power and Wide Range Programmable Clock Generator With a High Multiplication Factor.
IEEE Trans. Very Large Scale Integr. Syst., 2011

Low-Power Technique for SRAM-Based On-Chip Arbitrary-Waveform Generator.
IEEE Trans. Instrum. Meas., 2011

A New Power-Consumption Optimization Technique for Two-Stage Operational Amplifiers.
IEICE Trans. Electron., 2011

2010
A 122-mW Low-Power Multiresolution Spectrum-Sensing IC With Self-Deactivated Partial Swing Techniques.
IEEE Trans. Circuits Syst. II Express Briefs, 2010

Analysis and Design of Fully Integrated High-Power Parallel-Circuit Class-E CMOS Power Amplifiers.
IEEE Trans. Circuits Syst. I Regul. Pap., 2010

Emerging multi-level architectures and unbalanced mismatch calibration technique for high-efficient and high-linear LINC systems.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

Subthreshold current mode matrix determinant computation for analog signal processing.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

A dynamic timing control technique utilizing time borrowing and clock stretching.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2010

2009
Analysis and Design Techniques of CMOS Charge-Pump-Based Radio-Frequency Antenna-Switch Controllers.
IEEE Trans. Circuits Syst. I Regul. Pap., 2009

A Fully Integrated UHF-Band CMOS Receiver With Multi-Resolution Spectrum Sensing (MRSS) Functionality for IEEE 802.22 Cognitive Radio Applications.
IEEE J. Solid State Circuits, 2009

60GHz single-chip CMOS digital radios and phased array solutions for gaming and connectivity.
IEEE J. Sel. Areas Commun., 2009

Realizing Gbps wireless personal area networks - guest editorial.
IEEE J. Sel. Areas Commun., 2009

MAC Controlled LINC Calibration using Pilot-Aided LSE Channel Estimator for OFDM Systems.
Proceedings of the 69th IEEE Vehicular Technology Conference, 2009

A 3.6mW differential common-gate CMOS LNA with positive-negative feedback.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009

60GHz CMOS/PCB co-design and phased array technology.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2009

2008
A Low-Power Fully Monolithic Subthreshold CMOS Receiver With Integrated LO Generation for 2.4 GHz Wireless PAN Applications.
IEEE J. Solid State Circuits, 2008

Power-Combining Transformer Techniques for Fully-Integrated CMOS Power Amplifiers.
IEEE J. Solid State Circuits, 2008

A 90nm CMOS 60GHz Radio.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

A 39.1-to-41.6GHz ΔΣ Fractional-N Frequency Synthesizer in 90nm CMOS.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

A Fully-Integrated UHF Receiver with Multi-Resolution Spectrum-Sensing (MRSS) Functionality for IEEE 802.22 Cognitive-Radio Applications.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

A charge-pump based 0.35µm CMOS RF switch driver for multi-standard operations.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

A Cross-layer Cognitive Radio Testbed for the Evaluation of Spectrum Sensing Receiver and Interference Analysis.
Proceedings of the 3rd International ICST Conference on Cognitive Radio Oriented Wireless Networks and Communications, 2008

A SOC/SOP co-design approach for mmW CMOS in QFN technology.
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

2007
Development of Multi-Broadband Planar Wire Antennas for Wireless Applications.
Wirel. Pers. Commun., 2007

Interference Analysis and Sensing Threshold of Detect and Avoid (DAA) for UWB Coexistence with WiMax.
Proceedings of the 66th IEEE Vehicular Technology Conference, 2007

A Cognitive Radio (CR)-Based Mobile Interactive Digital Broadcasting Application adopting a Multi-Resolution Spectrum-Sensing (MRSS) Technique.
Proceedings of the 66th IEEE Vehicular Technology Conference, 2007

A 0.25-um BiCMOS Feed Foward Equalizer Using Active Delay Line for Backplane Communication.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Digitally Controlled 10-Gb/s Adjustable Delay Line for Adaptive Filter Design in standard CMOS Technology.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

CMOS High Power SPDT Switch using Multigate Structure.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

2006
A Cognitive Radio (CR) Testbed System Employing a Wideband Multi-Resolution Spectrum Sensing (MRSS) Technique.
Proceedings of the 64th IEEE Vehicular Technology Conference, 2006

Effects of RF impairments in transmitter for the future beyond-3G communications systems.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Investigation of inductors for digital Si-CMOS technologies.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

A wideband analog multi-resolution spectrum sensing (MRSS) technique for cognitive radio (CR) systems.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

A reconfigurable fully-integrated 0.18µm CMOS feed forward equalizer IC for 10-Gb/sec backplane links.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

A Cognitive Radio (CR) System Employing A Dual-Stage Spectrum Sensing Technique : A Multi-Resolution Spectrum Sensing (MRSS) and A Temporal Signature Detection (TSD) Technique.
Proceedings of the Global Telecommunications Conference, 2006. GLOBECOM '06, San Francisco, CA, USA, 27 November, 2006

Implementation Issues of A Wideband Multi-Resolution Spectrum Sensing (MRSS) Technique for Cognitlve Radio (CR) Systems.
Proceedings of the 1st International ICST Conference on Cognitive Radio Oriented Wireless Networks and Communications, 2006

2005
A Novel Clock Recovery Scheme with Improved Jitter Tolerance for PAM4 Signaling.
Proceedings of the 5th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC 2005), 2005

A 0.18µm-CMOS near-end crosstalk (NEXT) noise canceller utilizing tunable active filters for 4-PAM/20Gbps throughput backplane channels.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2004
Gigabit wireless: system-on-a-package technology.
Proc. IEEE, 2004

2003
Development of 2.4 GHz RF Transceiver Front-end Chipset in 0.25µm CMOS.
Proceedings of the 16th International Conference on VLSI Design (VLSI Design 2003), 2003

SiGe HBT power amplifier for IS-95 CDMA using a novel process, voltage, and temperature insensitive biasing scheme.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003


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