Jon Turino

According to our database, Jon Turino authored at least 7 papers between 1984 and 2000.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2000

DFT and BIST techniques for the future.

Hsin-Po Wang, Jon Turino

Proceedings of the 9th Asian Test Symposium (ATS 2000), 4-6 December 2000, Taipei, Taiwan, 2000

1999

Design for Test and Time to Market: A Personal Perspective.

Jon Turino

IEEE Des. Test Comput., 1999

Design for test and time to market-friends or foes.

Jon Turino

Proceedings of the Proceedings IEEE International Test Conference 1999, 1999

1997

Test Economics in the 21st Century.

Jon Turino

IEEE Des. Test Comput., 1997

1993

DFT: Profit or Loss -- A Position Paper.

Jon Turino

Proceedings of the Proceedings IEEE International Test Conference 1993, Designing, Testing, and Diagnostics, 1993

1988

IEEE P1149 Proposed Standard Testability Bus - An update with case histories.

Jon Turino

Proceedings of the Computer Design: VLSI in Computers and Processors, 1988

1984

A Totally Universal Reset, Initialization (and) Nodal Observation Circuit.

Jon Turino

Proceedings of the Proceedings International Test Conference 1984, 1984