José Eduardo Henriques da Silva

According to our database, José Eduardo Henriques da Silva authored at least 7 papers between 2018 and 2022.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2022

High-performance cartesian genetic programming on GPU for the inference of gene regulatory networks using scRNA-seq time-series data.

Luciana Nascimento Santana Prachedes, José Eduardo Henriques da Silva, Heder Soares Bernardino, Itamar Leite de Oliveira

Proceedings of the GECCO '22: Genetic and Evolutionary Computation Conference, Companion Volume, Boston, Massachusetts, USA, July 9, 2022

2021

On the Analysis of CGP Mutation Operators When Inferring Gene Regulatory Networks Using ScRNA-Seq Time Series Data.

José Eduardo Henriques da Silva, Heder S. Bernardino, Itamar Leite de Oliveira, Alex Borges Vieira, Helio J. C. Barbosa

Proceedings of the Intelligent Systems - 10th Brazilian Conference, 2021

2020

A benchmark suite for designing combinational logic circuits via metaheuristics.

Lucas Augusto Müller de Souza, José Eduardo Henriques da Silva, Luciano Jerez Chaves, Heder Soares Bernardino

Appl. Soft Comput., 2020

Inferring Gene Regulatory Network Models from Time-Series Data Using Metaheuristics.

José Eduardo Henriques da Silva, Heder S. Bernardino, Helio José Corrêa Barbosa, Alex Borges Vieira, Campos Luciana C. D., Itamar Leite de Oliveira

Proceedings of the IEEE Congress on Evolutionary Computation, 2020

2019

Cartesian Genetic Programming with Guided and Single Active Mutations for Designing Combinational Logic Circuits.

José Eduardo Henriques da Silva, Lucas Augusto Müller de Souza, Heder Soares Bernardino

Proceedings of the Machine Learning, Optimization, and Data Science, 2019

A 3-Step Cartesian Genetic Programming for Designing Combinational Logic Circuits with Multiplexers.

José Eduardo Henriques da Silva, Heder Soares Bernardino

Proceedings of the Progress in Artificial Intelligence, 2019

2018

Cartesian Genetic Programming with Crossover for Designing Combinational Logic Circuits.

José Eduardo Henriques da Silva, Heder Bernardino

Proceedings of the 7th Brazilian Conference on Intelligent Systems, 2018