Jose Ignacio Villar

According to our database, Jose Ignacio Villar authored at least 3 papers between 2009 and 2012.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

2012

Long-term on-chip verification of systems with logical events scattered in time.

Julian Viejo, Jose Ignacio Villar, Jorge Juan, Alejandro Millán, Enrique Ostúa, Juan Quiros

Microprocess. Microsystems, 2012

2010

Design and implementation of a suitable core for on-chip long-term verification.

Julian Viejo, Jose Ignacio Villar, Jorge Juan, Alejandro Millán, Manuel Jesús Bellido Díaz, Enrique Ostúa

Proceedings of the IEEE Fifth International Symposium on Industrial Embedded Systems, 2010

2009

Efficient techniques and methodologies for embedded system design usign free hardware and open standards.

Jose Ignacio Villar, Jorge Juan, Manuel J. Bellido

Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009