José M. Arce-Zavala

According to our database, José M. Arce-Zavala authored at least 6 papers between 2015 and 2022.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2022

Four-quadrant multiplier using the floating-bulk technique for rail-to-rail input range and insensitivity to different input dc levels.

Ivan R. Padilla-Cantoya, Marco Antonio Gurrola-Navarro, Carlos Alberto Bonilla Barragán, Jesus E. Molinar-Solis, Agustín Santiago Medina-Vázquez, José M. Arce-Zavala, Luis Rizo Domínguez

IEICE Electron. Express, 2022

2020

A Method to Model the Volume Charge Density in a Multiple-Input Floating-Gate MOS Transistor.

Francisco Plascencia Jauregui, Agustín Santiago Medina-Vázquez, Edwin Becerra Alvarez, José M. Arce-Zavala, Sandra Flores Ruiz

Proceedings of the 17th International Conference on Electrical Engineering, 2020

A Gm-C Notch Filter Implemented With gm Over ID Technique For Biosignal Acquisition Systems.

José M. Arce-Zavala, Agustín Santiago Medina-Vázquez, Ivan R. Padilla-Cantoya, Fransico Plascencia

Proceedings of the 17th International Conference on Electrical Engineering, 2020

2018

Experimental analysis of microstrip antennas using techniques to improve the bandwidth.

Jonathan Martínez Moreno, Agustín Santiago Medina-Vázquez, Carlos Alberto Bonilla Barragán, José M. Arce-Zavala, José Martín Villegas González

Proceedings of the 9th IEEE Latin American Symposium on Circuits & Systems, 2018

2016

Binary sequence correlator using a MIFGMOS.

Agustín Santiago Medina-Vázquez, Marco Antonio Gurrola-Navarro, José M. Arce-Zavala, Maria Elena Meda-Campaña

IEICE Electron. Express, 2016

2015

Design and validation of a mixed-signal correlator using a multiple-input floating gate transistor.

José M. Arce-Zavala, Agustín Santiago Medina-Vázquez, Marco Antonio Gurrola-Navarro

Proceedings of the 12th International Conference on Electrical Engineering, 2015