Ivan R. Padilla-Cantoya

Orcid: 0000-0002-6825-706X

According to our database1, Ivan R. Padilla-Cantoya authored at least 22 papers between 2012 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
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PhD thesis 
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Links

On csauthors.net:

Bibliography

2022
Impedance-mode capacitance multiplier with OTA-based flipped voltage follower for high accuracy and large multiplication factor.
IEICE Electron. Express, 2022

Four-quadrant multiplier using the floating-bulk technique for rail-to-rail input range and insensitivity to different input dc levels.
IEICE Electron. Express, 2022

Class AB Differential Amplifier Implemented as an Impedance Gyrator and its Applications.
Proceedings of the 19th International Conference on Electrical Engineering, 2022

2021
Class AB Op-Amp With Accurate Static Current Control for Low and High Supply Voltages.
IEEE Trans. Circuits Syst. II Express Briefs, 2021

High Transconductance Gain Low Voltage Class AB OTA.
Proceedings of the 18th International Conference on Electrical Engineering, 2021

2020
Power-Scaling Output-Compensated Three-Stage OTAs for Wide Load Range Applications.
IEEE Trans. Circuits Syst. I Regul. Pap., 2020

Floating-bulk transistors: An alternative design technique for CMOS low-voltage analog circuits.
IEICE Electron. Express, 2020

Epilepsy Seizure Detection: A Heavy Tail Approach.
IEEE Access, 2020

Reduced Low-Voltage Electromyographic Signal Acquisition System Using Subthreshold Technique.
Proceedings of the 17th International Conference on Electrical Engineering, 2020

Reduced Capacitance Multiplier in Impedance-Mode with Large Scaling Factor and High Accuracy.
Proceedings of the 17th International Conference on Electrical Engineering, 2020

A Gm-C Notch Filter Implemented With gm Over ID Technique For Biosignal Acquisition Systems.
Proceedings of the 17th International Conference on Electrical Engineering, 2020

2018
Class AB flipped voltage follower with very low output resistance and no additional power.
IEICE Electron. Express, 2018

Capacitance multiplier with large multiplication factor, high accuracy, and low power and silicon area for floating applications.
IEICE Electron. Express, 2018

2017
Using FPGA implementations for evaluation of internet retransmission-time-out predictors.
Proceedings of the Fifth European Conference on the Engineering of Computer-Based Systems, 2017

2015
Enhanced Grounded Capacitor Multiplier and Its Floating Implementation for Analog Filters.
IEEE Trans. Circuits Syst. II Express Briefs, 2015

2014
High performance voltage follower with very low output resistance for WTA applications.
IEICE Electron. Express, 2014

Comparison of conventional and new class AB modifications of the Flipped Voltage Follower and their implementation in high performance amplifiers.
Proceedings of the IEEE 5th Latin American Symposium on Circuits and Systems, 2014

2013
Capacitor Multiplier With Wide Dynamic Range and Large Multiplication Factor for Filter Applications.
IEEE Trans. Circuits Syst. II Express Briefs, 2013

Low-Power High Parallel Load Resistance Current-Mode Grounded and Floating Capacitor Multiplier.
IEEE Trans. Circuits Syst. II Express Briefs, 2013

Multiple stage capacitor multiplier using dual-output differential amplifiers.
Proceedings of the 4th IEEE Latin American Symposium on Circuits and Systems, 2013

2012
Low-voltage differential voltage follower for WTA and fully differential applications.
IEICE Electron. Express, 2012

Compact low-voltage CMOS analog divider using a four-quadrant multiplier and biasing control circuit.
Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012


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