José V. Busquets-Mataix

According to our database, José V. Busquets-Mataix authored at least 14 papers between 1995 and 2019.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2019

Human-computer cooperation platform for developing real-time robotic applications.

Carlos Domínguez, Juan-Miguel Martinez-Rubio, José V. Busquets-Mataix, Houcine Hassan

J. Supercomput., 2019

2011

Architecture Extensions for Efficient Management of Scratch-Pad Memory.

José V. Busquets-Mataix, Carlos Catalá, Antonio Martí Campoy

Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation, 2011

2005

On Using Locking Caches in Embedded Real-Time Systems.

Antonio Martí Campoy, Eugenio Tamura, Sergio Sáez, Francisco Rodríguez, José V. Busquets-Mataix

Proceedings of the Embedded Software and Systems, Second International Conference, 2005

Cache Contents Selection for Statically-Locked Instruction Caches: An Algorithm Comparison.

Antonio Martí Campoy, Isabelle Puaut, Angel Perles Ivars, José V. Busquets-Mataix

Proceedings of the 17th Euromicro Conference on Real-Time Systems (ECRTS 2005), 2005

2003

Schedulability Analysis in EDF Scheduler with Cache Memories.

Antonio Martí Campoy, Sergio Sáez, Angel Perles, J. V. Busquets

Proceedings of the Real-Time and Embedded Computing Systems and Applications, 2003

2000

Techniques to increase the schedulable utilization of cache-based preemptive real-time systems.

José V. Busquets-Mataix, Daniel Gil, Pedro J. Gil, Andy J. Wellings

J. Syst. Archit., 2000

1999

Distributed industrial control systems: a fault-tolerant architecture.

José Carlos Campelo, Francisco Rodríguez, Alicia Rubio, Rafael Ors, Pedro J. Gil, Lenin Lemus, J. V. Busquets, José Albaladejo, Juan José Serrano

Microprocess. Microsystems, 1999

Fault Injection into VHDL Models: Experimental Validation of a Fault Tolerant Microcomputer System.

Daniel Gil, R. Martínez, J. V. Busquets, Juan Carlos Baraza, Pedro J. Gil

Proceedings of the Dependable Computing, 1999

1998

Fault Injection into VHDL Models: Analysis of the Error Syndrome of a Microcomputer System.

Daniel Gil, Juan Carlos Baraza, J. V. Busquets, Pedro J. Gil

Proceedings of the 24th EUROMICRO '98 Conference, 1998

1997

Hybrid instruction cache partitioning for preemptive real-time systems.

José V. Busquets-Mataix, Juan José Serrano, Andy J. Wellings

Proceedings of the Ninth Euromicro Workshop on Real-Time Systems, 1997

1996

Using harmonic task-sets to increase the schedulable utilization of cache-based preemptive real-time systems.

José V. Busquets-Mataix, Juan José Serrano, Rafael Ors, Pedro J. Gil, Andy J. Wellings

Proceedings of the Third International Workshop on Real-Time Computing Systems Application (RTCSA '96), October 30, 1996

Adding instruction cache effect to schedulability analysis of preemptive real-time systems.

José V. Busquets-Mataix, Juan José Serrano, Rafael Ors, Pedro J. Gil, Andy J. Wellings

Proceedings of the 2nd IEEE Real-Time Technology and Applications Symposium, 1996

Adding Instruction Cache Effect to an Exact Schedulability Analysis of Preemptive Real-Time Systems.

José V. Busquets-Mataix, Juan José Serrano, Rafael Ors Carot, Pedro J. Gil, Andrew J. Wellings

Proceedings of the Eighth Euromicro Workshop on Real-Time Systems, 1996

1995

The impact of extrinsic cache performance on predictability of real-time systems.

José V. Busquets-Mataix, Juan José Serrano

Proceedings of the 2nd International Workshop on Real-Time Computing Systems and Applications, October 25, 1995