José V. Francés

According to our database, José V. Francés authored at least 11 papers between 2000 and 2019.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2019

A Novel Systolic Parallel Hardware Architecture for the FPGA Acceleration of Feedforward Neural Networks.

Leandro D. Medus, Taras Iakymchuk, José Vicente Francés-Víllora, Manuel Bataller-Mompeán, Alfredo Rosado Muñoz

IEEE Access, 2019

2017

Ventricular Fibrillation and Tachycardia detection from surface ECG using time-frequency representation images as input dataset for machine learning.

Azeddine Mjahad, Alfredo Rosado Muñoz, Manuel Bataller-Mompeán, José V. Francés, Juan Guerrero-Martínez

Comput. Methods Programs Biomed., 2017

2016

Support Tool for the Combined Software/Hardware Design of On-Chip ELM Training for SLFF Neural Networks.

Manuel Bataller-Mompeán, José Miguel Martínez-Villena, Alfredo Rosado Muñoz, José Vicente Francés-Víllora, Juan Guerrero-Martínez, Marek Wegrzyn, Marian Adamski

IEEE Trans. Ind. Informatics, 2016

Versatile Direct and Transpose Matrix Multiplication with Chained Operations: An Optimized Architecture Using Circulant Matrices.

Taras Iakymchuk, Alfredo Rosado Muñoz, Manuel Bataller-Mompeán, José Vicente Francés-Víllora, Emmanuel Ovie Osimiry

IEEE Trans. Computers, 2016

Hardware implementation of real-time Extreme Learning Machine in FPGA: Analysis of precision, resource occupation and performance.

José Vicente Francés-Víllora, Alfredo Rosado Muñoz, José M. Martínez-Villena, Manuel Bataller-Mompeán, Juan-Francisco Guerrero-Martínez, Marek Wegrzyn

Comput. Electr. Eng., 2016

Event-based encoding from digital magnetic compass and ultrasonic distance sensor for navigation in mobile systems.

Juan Barrios-Aviles, Taras Iakymchuk, Alfredo Rosado Muñoz, José V. Francés-Víllora, Manuel Bataller-Mompeán, Juan Guerrero-Martínez

Proceedings of the 14th IEEE International Conference on Industrial Informatics, 2016

2015

Simplified spiking neural network architecture and STDP learning algorithm applied to image classification.

Taras Iakymchuk, Alfredo Rosado Muñoz, Juan Guerrero-Martínez, Manuel Bataller-Mompeán, José V. Francés-Víllora

EURASIP J. Image Video Process., 2015

Design environment for hardware generation of SLFF neural network topologies with ELM training capability.

José Miguel Martínez-Villena, José Vicente Francés-Víllora, Alfredo Rosado Muñoz, Manuel Bataller-Mompeán, Juan-Francisco Guerrero-Martínez, Marek Wegrzyn, Marian Adamski

Proceedings of the 13th IEEE International Conference on Industrial Informatics, 2015

2012

Fast spiking neural network architecture for low-cost FPGA devices.

Taras Iakymchuk, Alfredo Rosado, José V. Francés, Manuel Bataller

Proceedings of the 7th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), 2012

2003

High performance hardware correlation coefficient assessment using programmable logic for ECG signals.

Alfredo Rosado, Manuel Bataller-Mompeán, Juan Guerrero-Martínez, Javier Calpe, José V. Francés, José Rafael Magdalena Benedicto

Microprocess. Microsystems, 2003

2000

Application of ARMA modeling to the improvement of weight estimations in fruit sorting and grading machinery.

José V. Francés, Javier Calpe, M. Martínez, Alfredo Rosado, Antonio J. Serrano, Javier Calleja, M. Díaz

Proceedings of the IEEE International Conference on Acoustics, 2000