Josef Heel
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Bibliography
2025
A 12.8-GS/s Time-Interleaved Sub-Sampling ADC Front End With 38-GHz Input Bandwidth and >39-dB SNDR for 1-32 GHz in 22-nm FDSOI.
IEEE J. Solid State Circuits, December, 2025
A 12.8GS/s Sub-Sampling ADC Front-End With 38GHz Input Bandwidth and >39dB SNDR for 1 to 32GHz in 22nm FDSOI.
Proceedings of the IEEE International Solid-State Circuits Conference, 2025