Bram Nauta
Orcid: 0000-0001-6790-5873
According to our database1,
Bram Nauta
authored at least 216 papers
between 1995 and 2024.
Collaborative distances:
Collaborative distances:
Awards
IEEE Fellow
IEEE Fellow 2008, "For contributions to integrated analog circuit design".
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
Online presence:
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on orcid.org
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on id.loc.gov
On csauthors.net:
Bibliography
2024
5.5 A Stacking Mixer-First Receiver Achieving >20dBm Adjacent-Channel IIP3 Consuming less than 25mW.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024
Proceedings of the IEEE International Solid-State Circuits Conference, 2024
2023
A Single-Trim Frequency Reference System With 0.7 ppm/°C From -63 °C to 165 °C Consuming 210 μW at 70 MHz.
IEEE J. Solid State Circuits, September, 2023
Hardware Implementations for Voice Activity Detection: Trends, Challenges and Outlook.
IEEE Trans. Circuits Syst. I Regul. Pap., March, 2023
A Predistortion-Less Digital MIMO Transmitter With DTC-Based Quadrature Imbalance Compensation.
IEEE J. Solid State Circuits, 2023
Inverter Chain Buffer Optimization for N-path Filter Switch Drivers and Validation through Simulations in 22nm FD-SOI Technology.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
Proceedings of the 53rd IEEE European Solid-State Device Research Conference, 2023
A 50μW 2.45GHz Direct-Conversion RX with On-Chip LO with -84dBm Sensitivity for 1Mb/s GFSK.
Proceedings of the 49th IEEE European Solid State Circuits Conference, 2023
2022
IEEE Trans. Circuits Syst. I Regul. Pap., 2022
Low-Power High-Linearity Mixer-First Receiver Using Implicit Capacitive Stacking With 3× Voltage Gain.
IEEE J. Solid State Circuits, 2022
A 22-nm FDSOI CMOS Low-Noise Active Balun Achieving <sub>p-p</sub> Output Swing Over 0.01-5.4-GHz for Direct RF Sampling Applications.
IEEE J. Solid State Circuits, 2022
Quantifying the Trade-off Between Latency and Power Consumption in Bluetooth Low Energy and Its Mitigation by Using a Wake-Up Receiver.
Proceedings of the 8th IEEE World Forum on Internet of Things, 2022
A 174μVRMS Input Noise, 1 G8/s Comparator in 22nm FDSOI with a Dynamic-Bias Preamplifier Using Tail Charge Pump and Capacitive Neutralization Across the Latch.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022
2021
Power Efficiency Model for MIMO Transmitters Including Memory Polynomial Digital Predistortion.
IEEE Trans. Circuits Syst. II Express Briefs, 2021
2.4-GHz Highly Selective IoT Receiver Front End With Power Optimized LNTA, Frequency Divider, and Baseband Analog FIR Filter.
IEEE J. Solid State Circuits, 2021
IEEE J. Solid State Circuits, 2021
A 0.7-5.7 GHz Reconfigurable MIMO Receiver Architecture for Analog Spatial Notch Filtering Using Orthogonal Beamforming.
IEEE J. Solid State Circuits, 2021
IEEE J. Solid State Circuits, 2021
A Baseband-Matching-Resistor Noise-Canceling Receiver With a Three-Stage Inverter-Only OpAmp for High In-Band IIP3 and Wide IF Applications.
IEEE J. Solid State Circuits, 2021
Compensating Processing Delay in Excess of One Clock Cycle in Noise Shaping Loops Without Altering the Filter Topology.
IEEE Access, 2021
2020
Analysis of Switched Capacitor Losses in Polar and Quadrature Switched Capacitor PAs.
IEEE Trans. Circuits Syst. II Express Briefs, 2020
IEEE Trans. Circuits Syst. I Regul. Pap., 2020
IEEE Trans. Circuits Syst. I Regul. Pap., 2020
Low-Power Highly Selective Channel Filtering Using a Transconductor-Capacitor Analog FIR.
IEEE J. Solid State Circuits, 2020
A Fully Passive RF Front End With 13-dB Gain Exploiting Implicit Capacitive Stacking in a Bottom-Plate N-Path Filter/Mixer.
IEEE J. Solid State Circuits, 2020
EVM-based Performance Evaluation of Co-channel Interference Mitigation using Spatial Filtering for Digital MIMO Receivers.
Proceedings of the 92nd IEEE Vehicular Technology Conference, 2020
30.4 A 370µW 5.5dB-NF BLE/BT5.0/IEEE 802.15.4-Compliant Receiver with >63dB Adjacent Channel Rejection at >2 Channels Offset in 22nm FDSOI.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020
A Colpitts-Based Frequency Reference Achieving a Single-Trim ± 120ppm Accuracy from -50 to 170°C.
Proceedings of the 2020 IEEE Custom Integrated Circuits Conference, 2020
2019
IEEE Trans. Circuits Syst. I Regul. Pap., 2019
A +20 dBm Highly Efficient Linear Outphasing Class-E PA Without AM/AM and AM/PM Characterization Requirements.
IEEE Trans. Circuits Syst. II Express Briefs, 2019
Improving Receiver Close-In Blocker Tolerance by Baseband G<sub>m</sub>-C Notch Filtering.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019
High-Linearity Bottom-Plate Mixing Technique With Switch Sharing for N-path Filters/Mixers.
IEEE J. Solid State Circuits, 2019
Fast & Energy Efficient Start-Up of Crystal Oscillators by Self-Timed Energy Injection.
IEEE J. Solid State Circuits, 2019
A Self-Oscillating Boosting Amplifier With Adaptive Soft Switching Control for Piezoelectric Transducers.
IEEE J. Solid State Circuits, 2019
A 0.2 - 8 MS/s 10b flexible SAR ADC achieving 0.35 - 2.5 fJ/conv-step and using self-quenched dynamic bias comparator.
Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019
A 0.06-3.4-MHz 92-μW Analog FIR Channel Selection Filter With Very Sharp Transition Band for IoT Receivers.
Proceedings of the 45th IEEE European Solid State Circuits Conference, 2019
A 4MS/s 10b SAR ADC with integrated Class-A buffers in 65nm CMOS with near rail-to-rail input using a single 1.2V supply.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2019
2018
IEEE Trans. Circuits Syst. II Express Briefs, 2018
IEEE Trans. Circuits Syst. II Express Briefs, 2018
Enhanced-Selectivity High-Linearity Low-Noise Mixer-First Receiver With Complex Pole Pair Due to Capacitive Positive Feedback.
IEEE J. Solid State Circuits, 2018
IEEE J. Solid State Circuits, 2018
IEEE J. Solid State Circuits, 2018
IEEE J. Solid State Circuits, 2018
Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018
2017
IEEE Trans. Circuits Syst. I Regul. Pap., 2017
Beamformer With Constant-Gm Vector Modulators and Its Spatial Intermodulation Distortion.
IEEE J. Solid State Circuits, 2017
24.3 A high-linearity CMOS receiver achieving +44dBm IIP3 and +13dBm B1dB for SAW-less LTE radio.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017
Proceedings of the 43rd IEEE European Solid State Circuits Conference, 2017
Proceedings of the 43rd IEEE European Solid State Circuits Conference, 2017
Multi-phase sub-sampling fractional-N PLL with soft loop switching for fast robust locking.
Proceedings of the 2017 IEEE Custom Integrated Circuits Conference, 2017
Proceedings of the 2017 IEEE Custom Integrated Circuits Conference, 2017
A digital sine-weighted switched-Gm mixer for single-clock power-scalable parallel receivers.
Proceedings of the 2017 IEEE Custom Integrated Circuits Conference, 2017
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2017
2016
A 915 MHz 175 µW Receiver Using Transmitted-Reference and Shifted Limiters for 50 dB In-Band Interference Tolerance.
IEEE J. Solid State Circuits, 2016
Introduction to the Special Issue on the 41st European Solid-State Circuits Conference (ESSCIRC).
IEEE J. Solid State Circuits, 2016
26.2 An Ultra-Low-Power receiver using transmitted-reference and shifted limiters for in-band interference resilience.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016
Proceedings of the 46th European Solid-State Device Research Conference, 2016
2015
A Sensitive Method to Measure the Integral Nonlinearity of a Digital-to-Time Converter Based on Phase Modulation.
IEEE Trans. Circuits Syst. II Express Briefs, 2015
IEEE Trans. Circuits Syst. I Regul. Pap., 2015
Analysis of the Signal Transfer and Folding in N-Path Filters With a Series Inductance.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015
RF Transconductor Linearization Robust to Process, Voltage and Temperature Variations.
IEEE J. Solid State Circuits, 2015
IEEE J. Solid State Circuits, 2015
IEEE J. Solid State Circuits, 2015
A High-Voltage Class-D Power Amplifier With Switching Frequency Regulation for Improved High-Efficiency Output Power Range.
IEEE J. Solid State Circuits, 2015
Compact Cascadable g m -C All-Pass True Time Delay Cell With Reduced Delay Variation Over Frequency.
IEEE J. Solid State Circuits, 2015
An In-Band Full-Duplex Radio Receiver With a Passive Vector Modulator Downmixer for Self-Interference Cancellation.
IEEE J. Solid State Circuits, 2015
5.5 A forward-body-bias tuned 450MHz Gm-C 3<sup>rd</sup>-order low-pass filter in 28nm UTBB FD-SOI with >1dBVp IIP3 over a 0.7-to-1V supply.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015
19.2 A self-interference-cancelling receiver for in-band full-duplex wireless with low distortion under cancellation of strong TX leakage.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015
Proceedings of the ESSCIRC Conference 2015, 2015
Multiphase RF techniques in CMOS: Applied to beam-forming and full duplex receivers: CICC 2015 educational session.
Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015
Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015
2014
A 100-800 MHz 8-Path Polyphase Transmitter With Mixer Duty-Cycle Control Achieving <-40 dBc for ALL Harmonics.
IEEE J. Solid State Circuits, 2014
Comments on "Cancellation of OpAmp Virtual Ground Imperfections by a Negative Conductance Applied to Improve RF Receiver Linearity".
IEEE J. Solid State Circuits, 2014
Cancellation of OpAmp Virtual Ground Imperfections by a Negative Conductance Applied to Improve RF Receiver Linearity.
IEEE J. Solid State Circuits, 2014
IEEE J. Solid State Circuits, 2014
A 4-Element Phased-Array System With Simultaneous Spatial- and Frequency-Domain Filtering at the Antenna Inputs.
IEEE J. Solid State Circuits, 2014
IEEE J. Sel. Areas Commun., 2014
Int. J. Circuit Theory Appl., 2014
An Ultra Low Energy FSK Receiver With In-Band Interference Robustness Exploiting a Three-Phase Chirped LO.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2014
IEEE Commun. Mag., 2014
A 110mW, 0.04mm<sup>2</sup>, 11GS/s 9-bit interleaved DAC in 28nm FDSOI with >50dB SFDR across Nyquist.
Proceedings of the Symposium on VLSI Circuits, 2014
3.5 A 1.0-to-2.5GHz beamforming receiver with constant-Gm vector modulator consuming.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014
17.1 An integrated 80V 45W class-D power amplifier with optimal-efficiency-tracking switching frequency regulation.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014
A 500MHz- 2.7 GHz 8-path weaver downconverter with harmonic rejection and embedded filtering.
Proceedings of the ESSCIRC 2014, 2014
Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014
RF transconductor linearization technique robust to process, voltage and temperature variations.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2014
2013
IEEE Trans. Circuits Syst. II Express Briefs, 2013
Flip-Flops for Accurate Multiphase Clocking: Transmission Gate Versus Current Mode Logic.
IEEE Trans. Circuits Syst. II Express Briefs, 2013
IEEE J. Solid State Circuits, 2013
A Flicker Noise/IM3 Cancellation Technique for Active Mixer Using Negative Impedance.
IEEE J. Solid State Circuits, 2013
IEEE J. Solid State Circuits, 2013
Spectrum Sensing With High Sensitivity and Interferer Robustness Using Cross-Correlation Energy Detection.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2013
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013
Simultaneous spatial and frequency-domain filtering at the antenna inputs achieving up to +10dBm out-of-band/beam P1dB.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013
A 0.1-to-1.2GHz tunable 6th-order N-path channel-select filter with 0.6dB passband ripple and +7dBm blocker tolerance.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013
An integrated 80-V class-D power output stage with 94% efficiency in a 0.14µm SOI BCD process.
Proceedings of the ESSCIRC 2013, 2013
2012
IEEE Trans. Circuits Syst. I Regul. Pap., 2012
A CMOS-Compatible Spectrum Analyzer for Cognitive Radio Exploiting Crosscorrelation to Improve Linearity and Noise Performance.
IEEE Trans. Circuits Syst. I Regul. Pap., 2012
IEEE J. Solid State Circuits, 2012
Widely Tunable 4th Order Switched G<sub>m</sub>-C Band-Pass Filter Based on N-Path Filters.
IEEE J. Solid State Circuits, 2012
Active feedback receiver with integrated tunable RF channel selectivity, distortion cancelling, 48dB stopband rejection and >+12dBm wideband IIP3, occupying <sup>2</sup> in 65nm CMOS.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012
A 1.5-to-5.0GHz input-matched +2dBm P1dB all-passive switched-capacitor beamforming receiver front-end in 65nm CMOS.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012
A 65nm CMOS 1-to-10GHz tunable continuous-time low-pass filter for high-data-rate communications.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012
A 0.3-to-1.2GHz tunable 4<sup>th</sup>-order switched gm-C bandpass filter with >55dB ultimate rejection and out-of-band IIP3 of +29dBm.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012
Direct-digital modulation (DIDIMO) transmitter with -156dBc/Hz Rx-band noise using FIR structure.
Proceedings of the 38th European Solid-State Circuit conference, 2012
Proceedings of the 38th European Solid-State Circuit conference, 2012
2011
IEEE Trans. Veh. Technol., 2011
IEEE Trans. Circuits Syst. I Regul. Pap., 2011
Spatial Interferer Rejection in a Four-Element Beamforming Receiver Front-End With a Switched-Capacitor Vector Modulator.
IEEE J. Solid State Circuits, 2011
A 65-nm CMOS Temperature-Compensated Mobility-Based Frequency Reference for Wireless Sensor Networks.
IEEE J. Solid State Circuits, 2011
IEEE J. Solid State Circuits, 2011
Proceedings of the 74th IEEE Vehicular Technology Conference, 2011
A 1.0-to-4.0GHz 65nm CMOS four-element beamforming receiver using a switched-capacitor vector modulator with approximate sine weighting via charge redistribution.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
Effects of packaging and process spread on a mobility-based frequency reference in 0.16-μm CMOS.
Proceedings of the 37th European Solid-State Circuits Conference, 2011
A narrow-to-wideband scrambling technique increasing software radio receiver linearity.
Proceedings of the 37th European Solid-State Circuits Conference, 2011
2010
Unified Frequency-Domain Analysis of Switched-Series- RC Passive Mixers and Samplers.
IEEE Trans. Circuits Syst. I Regul. Pap., 2010
A 1.2-V 10-μ W NPN-Based Temperature Sensor in 65-nm CMOS With an Inaccuracy of 0.2°C (3 Sigma ) From - 70°C to 125°C.
IEEE J. Solid State Circuits, 2010
A 300-800 MHz Tunable Filter and Linearized LNA Applied in a Low-Noise Harmonic-Rejection RF-Sampling Receiver.
IEEE J. Solid State Circuits, 2010
IEEE J. Solid State Circuits, 2010
Power Efficient Gigabit Communication Over Capacitively Driven RC-Limited On-Chip Interconnects.
IEEE J. Solid State Circuits, 2010
Spur Reduction Techniques for Phase-Locked Loops Exploiting A Sub-Sampling Phase Detector.
IEEE J. Solid State Circuits, 2010
IEEE J. Solid State Circuits, 2010
IEEE J. Solid State Circuits, 2010
A 1.2V 10µW NPN-based temperature sensor in 65nm CMOS with an inaccuracy of ±0.2°C (3s) from -70°C to 125°C.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010
Proceedings of the IEEE International Solid-State Circuits Conference, 2010
A 2.4GHz 830pJ/bit duty-cycled wake-up receiver with -82dBm sensitivity for crystal-less wireless sensor nodes.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
2009
IEEE Trans. Very Large Scale Integr. Syst., 2009
IEEE Trans. Circuits Syst. II Express Briefs, 2009
IEEE Trans. Circuits Syst. I Regul. Pap., 2009
IEEE Trans. Circuits Syst. II Express Briefs, 2009
IEEE J. Solid State Circuits, 2009
IEEE J. Solid State Circuits, 2009
Digitally Enhanced Software-Defined Radio Receiver Robust to Out-of-Band Interference.
IEEE J. Solid State Circuits, 2009
A Low Noise Sub-Sampling PLL in Which Divider Noise is Eliminated and PD/CP Noise is Not Multiplied by N<sup>2</sup>.
IEEE J. Solid State Circuits, 2009
Proceedings of the IEEE International Solid-State Circuits Conference, 2009
Proceedings of the IEEE International Solid-State Circuits Conference, 2009
A 400-to-900 MHz receiver with dual-domain harmonic rejection exploiting adaptive interference cancellation.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009
A 2.2GHz 7.6mW sub-sampling PLL with -126dBc/Hz in-band phase noise and 0.15psrms jitter in 0.18µm CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009
Proceedings of the IEEE International Solid-State Circuits Conference, 2009
A 0.45pJ/conv-step 1.2Gs/s 6b full-Nyquist non-calibrated flash ADC in 45nm CMOS and its scaling behavior.
Proceedings of the 35th European Solid-State Circuits Conference, 2009
Proceedings of the 35th European Solid-State Circuits Conference, 2009
2008
A Two-Stage Approach to Harmonic Rejection Mixing Using Blind Interference Cancellation.
IEEE Trans. Circuits Syst. II Express Briefs, 2008
Theoretical Analysis of Highly Linear Tunable Filters Using Switched-Resistor Techniques.
IEEE Trans. Circuits Syst. I Regul. Pap., 2008
Advantages of Shift Registers Over DLLs for Flexible Low Jitter Multiphase Clock Generation.
IEEE Trans. Circuits Syst. II Express Briefs, 2008
IEEE Trans. Circuits Syst. II Express Briefs, 2008
IEEE J. Solid State Circuits, 2008
IEEE J. Solid State Circuits, 2008
Wideband Balun-LNA With Simultaneous Output Balancing, Noise-Canceling and Distortion-Canceling.
IEEE J. Solid State Circuits, 2008
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008
Digital Detection of Oxide Breakdown and Life-Time Extension in Submicron CMOS Technology.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008
2007
IEEE Trans. Very Large Scale Integr. Syst., 2007
IEEE Trans. Circuits Syst. I Regul. Pap., 2007
IEEE J. Solid State Circuits, 2007
Cognitive radios for dynamic spectrum access - polyphase multipath radio circuits for dynamic spectrum access.
IEEE Commun. Mag., 2007
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Low-Jitter Multi-phase Clock Generation: A Comparison between DLLs and Shift Registers.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Analytical Design Equations for Class-E Power Amplifiers with Finite DC-Feed Inductance and Switch On-Resistance.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Proceedings of the 33rd European Solid-State Circuits Conference, 2007
A Time-Interleaved Track & hold in 0.13 μm CMOS sub-sampling a 4 GHz signal with 43 dB SNDR.
Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007
2006
IEEE Trans. Circuits Syst. II Express Briefs, 2006
IEEE J. Solid State Circuits, 2006
Pulse-width modulation pre-emphasis applied in a wireline transmitter, achieving 33 dB loss compensation at 5-Gb/s in 0.13-μm CMOS.
IEEE J. Solid State Circuits, 2006
A 3-Gb/s/ch transceiver for 10-mm uninterrupted RC-limited global on-chip interconnects.
IEEE J. Solid State Circuits, 2006
A multipath technique for canceling harmonics and sidebands in a wideband power upconverter.
Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Proceedings of the 13th IEEE International Conference on Electronics, 2006
Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006
2005
IEEE Trans. Circuits Syst. I Regul. Pap., 2005
Microelectron. Reliab., 2005
IEEE J. Solid State Circuits, 2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Proceedings of the 31st European Solid-State Circuits Conference, 2005
Proceedings of the 31st European Solid-State Circuits Conference, 2005
Proceedings of the 31st European Solid-State Circuits Conference, 2005
2004
IEEE J. Solid State Circuits, 2004
IEEE J. Solid State Circuits, 2004
IEEE J. Solid State Circuits, 2004
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
A 1.6 GS/s, 16 times interleaved track & hold with 7.6 ENOB in 0.12 μm CMOS [ADC applications].
Proceedings of the 33rd European Solid-State Circuits Conference, 2004
Proceedings of the 33rd European Solid-State Circuits Conference, 2004
2003
IEEE Trans. Circuits Syst. II Express Briefs, 2003
2002
Proceedings of the 7th Asia and South Pacific Design Automation Conference (ASP-DAC 2002), 2002
2001
IEEE J. Solid State Circuits, 2001
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001
2000
IEEE J. Solid State Circuits, 2000
1999
Intrinsic 1/f device noise reduction and its effect on phase noise in CMOS ring oscillators.
IEEE J. Solid State Circuits, 1999
1998
IEEE J. Solid State Circuits, 1998
Embedded 5 V-to-3.3 V voltage regulator for supplying digital IC's in 3.3 V CMOS technology.
IEEE J. Solid State Circuits, 1998
1997
A CMOS "soft-switched" transconductor and its application in gain control and filters.
IEEE J. Solid State Circuits, 1997
1995
IEEE J. Solid State Circuits, December, 1995