Josep Maria Insenser

According to our database1, Josep Maria Insenser authored at least 9 papers between 1997 and 2001.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Bibliography

2001
A temporal bipartitioning algorithm for dynamically reconfigurable FPGAs.
IEEE Trans. Very Large Scale Integr. Syst., 2001

2000
Implementation of Virtual Circuits by Means of the FIPSOC Devices.
Proceedings of the Field-Programmable Logic and Applications, 2000

1999
The Role of Dynamic Reconfiguration for Implementing Artificial Neural Networks Models in Programmable Hardware.
Proceedings of the Engineering Applications of Bio-Inspired Artificial Neural Networks, 1999

A Bipartitioning Algorithm for Dynamic Reconfigurable Programmable Logic.
Proceedings of the Field-Programmable Logic and Applications, 9th International Workshop, 1999

Realization of Self-Repairing and Evolvable Hardware Structures by Means of Implicit Self-Configuration.
Proceedings of the 1st NASA / DoD Workshop on Evolvable Hardware (EH '99), 1999

1998
Feasible Evolutionary and Self-Repairing Hardware by Means of the Dynamic Reconfiguration Capabilities of the FIPSOC Devices.
Proceedings of the Evolvable Systems: From Biology to Hardware, 1998

Programmable analog hardware: a case study.
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998

1997
Multicontext dynamic reconfiguration and real time probing on a novel mixed signal programmable device with on-chip microprocessor.
Proceedings of the Field-Programmable Logic and Applications, 7th International Workshop, 1997

A new field programmable system-on-a-chip for mixed signal integration.
Proceedings of the European Design and Test Conference, 1997


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