Joseph I. Chamdani

According to our database, Joseph I. Chamdani authored at least 4 papers between 1995 and 1998.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

1998

Low Load Latency Through Sum-Addressed Memory (SAM).

William L. Lynch, Gary Lauterbach, Joseph I. Chamdani

Proceedings of the 25th Annual International Symposium on Computer Architecture, 1998

1996

Relating Communication Protocol Processin to Processor Performance.

Tsai Chi Huang, Roy W. Melton, Joseph I. Chamdani, Cecil O. Alford

Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 1996

Crossbar Controller for the Adaptive Multistage Crossbar Network.

Farzad Ghannadian, Toshiro Kubota, Joseph I. Chamdani, Philip R. Bingham, Cecil O. Alford

Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 1996

1995

GT-FITES: A Heterogeneous, Parallel Image Processing System.

Roy W. Melton, Tsai Chi Huang, Joseph I. Chamdani, Cecil O. Alford, Latika Becker

Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 1995