Joseph L. Tauritz

According to our database1, Joseph L. Tauritz authored at least 4 papers between 1994 and 1999.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
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Article 
PhD thesis 
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Links

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Bibliography

1999
Bipolar transistor epilayer design using the MAIDS mixed-level simulator.
IEEE J. Solid State Circuits, 1999

1998
A five-port deembedding method for floating two-port networks.
IEEE Trans. Instrum. Meas., 1998

1996
Advanced modeling of distortion effects in bipolar transistors using the Mextram model.
IEEE J. Solid State Circuits, 1996

1994
A figure of merit for the high-frequency noise behavior of bipolar transistors.
IEEE J. Solid State Circuits, October, 1994


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