Júlio S. Aude

According to our database1, Júlio S. Aude authored at least 7 papers between 1986 and 2004.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2004
Construction of the Voronoi Diagram by a Team of Cooperative Robots.
Proceedings of the ICINCO 2004, 2004

2002
TDR: A Distributed-Memory Parallel Routing Algorithm for FPGAs.
Proceedings of the Field-Programmable Logic and Applications, 2002

1997
Parallel Simulated Annealing: An Adaptive Approach.
Proceedings of the 11th International Parallel Processing Symposium (IPPS '97), 1997

1993
Arco: A cost-effective and flexible hardware maze router.
Microprocess. Microprogramming, 1993

1992
Evaluation of a sparc architecture with harvard bus and branch target cache.
Microprocess. Microprogramming, 1992

1989
Representation and Use of Design Rules within a Technology Adaptable CAD System.
Proceedings of the 26th ACM/IEEE Design Automation Conference, 1989

1986
A design rule database system to support technology-adaptable applications.
Proceedings of the 23rd ACM/IEEE Design Automation Conference. Las Vegas, 1986


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