Jun-Yu Yang

Orcid: 0000-0002-3649-8248

According to our database1, Jun-Yu Yang authored at least 5 papers between 2012 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

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Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2022
Tiny Phase-Error Monitor for Fault and Soft-Error-Tolerant DLL to Support Graceful Degradation and Module-Level Testing.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Process-Resilient Fault-Tolerant Delay-Locked Loop Using TMR With Dynamic Timing Correction.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

2020
A Voting Phase Detector Design with Mitigated Process Variation.
Proceedings of the International SoC Design Conference, 2020

Fault and Soft Error Tolerant Delay-Locked Loop.
Proceedings of the 29th IEEE Asian Test Symposium, 2020

2012
Vanishing point detection using local dominant orientation signature for omnidirectional vision-based robots.
Proceedings of the 2012 IEEE International Conference on Robotics and Biomimetics, 2012


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