Jung-Lin Yang

According to our database, Jung-Lin Yang authored at least 6 papers between 2003 and 2012.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of five.

2012

Asynchronous Circuit Design on Field Programmable Gate Array Devices.

Jung-Lin Yang, Shin-Nung Lu, Pei-Hsuan Yu

IEICE Trans. Electron., 2012

2010

HDLs Modeling Technique for Burst-Mode and Extended Burst-Mode Asynchronous Circuits.

Jung-Lin Yang, Jau-Cheng Wei, Shin-Nung Lu

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2010

2009

Ultra Low Power Delay Element with Post-Chip Adjustable Ability.

Jung-Lin Yang, Chih-Wei Chao

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2009

2006

High-Level Synthesis for Self-Timed Systems.

Jung-Lin Yang, Hsu-Ching Tien, Chia-Ming Hsu, Sung-Min Lin

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

2003

Self-Timed Design with Dynamic Domino Circuits.

Jung-Lin Yang, Erik Brunvand

Proceedings of the 2003 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2003), 2003

Using dynamic domino circuits in self-timed systems.

Jung-Lin Yang, Erik Brunvand

Proceedings of the 13th ACM Great Lakes Symposium on VLSI 2003, 2003