Jyh-Ting Lai
According to our database1,
Jyh-Ting Lai
authored at least 9 papers
between 2004 and 2008.
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Bibliography
2008
Cost-Effective Joint Echo-NEXT Canceller Designs for 10GBase-T Ethernet Systems Based on a Shortened Impulse Response Filter (SIRF) Scheme.
J. Signal Process. Syst., 2008
2007
A Systematic Design Approach to the Band-Tracking Packet Detector in OFDM-Based Ultrawideband Systems.
IEEE Trans. Veh. Technol., 2007
Joint AGC-Equalization Algorithm and VLSI Architecture for Wirelined Transceiver Designs.
IEEE Trans. Very Large Scale Integr. Syst., 2007
Robust Packet Detector based Automatic Gain Control Algorithm for OFDM-based Ultra-WideBand systems.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2007
2006
Proceedings of the IEEE Workshop on Signal Processing Systems, 2006
Proceedings of the IEEE Workshop on Signal Processing Systems, 2006
2004
High-performance VLSI architecture of adaptive decision feedback equalizer based on predictive parallel branch slicer (PPBS) scheme.
IEEE Trans. Very Large Scale Integr. Syst., 2004
Fast convergent pipelined adaptive DFE architecture using post-cursor processing filter technique.
IEEE Trans. Circuits Syst. II Express Briefs, 2004
1000BASE-T Gigabit Ethernet baseband DSP IC design.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004