Jyotirmoy Ghosh

According to our database, Jyotirmoy Ghosh authored at least 5 papers between 2008 and 2017.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2017

A Configurable and Area Efficient Technique for Implementing Isolation Cells in Low Power SoC.

Prokash Ghosh, Jyotirmoy Ghosh

Proceedings of the VLSI Design and Test - 21st International Symposium, 2017

2013

Control Scheme for Reduced Cross-Regulation in Single-Inductor Multiple-Output DC-DC Converters.

Pradipta Patra, Jyotirmoy Ghosh, Amit Patra

IEEE Trans. Ind. Electron., 2013

2012

Estimation of dc Performance of a Lateral Power MOSFET Using Distributed Cell Model.

Jyotirmoy Ghosh, Siddhartha Mukhopadhyay, Amit Patra, Barry Culpepper, Tawen Mei

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012

2009

A New Approach for Estimation of RDS(on) of Power Arrays: Extensions and Experimental Results.

Jyotirmoy Ghosh, Siddhartha Mukhopadhyay, Amit Patra, Barry Culpepper, Tawen Mei

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

2008

A New Approach for Estimation of On-Resistance and Current Distribution in Power Array Layouts.

Jyotirmoy Ghosh, Siddhartha Mukhopadhyay, Amit Patra, Barry Culpepper, Tawen Mei

Proceedings of the 21st International Conference on VLSI Design (VLSI Design 2008), 2008