K. Radhakrishna Rao

According to our database1, K. Radhakrishna Rao authored at least 12 papers between 1986 and 2006.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Links

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Bibliography

2006
Low Voltage Analogue Multiplier.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

2003
Narrow Band Noise Suppression Scheme for improving Signal to Noise Ratio.
Proceedings of the 16th International Conference on VLSI Design (VLSI Design 2003), 2003

A Low-Voltage Low Power CMOS Companding Filter.
Proceedings of the 16th International Conference on VLSI Design (VLSI Design 2003), 2003

2002
A low-voltage low power square-root domain filter.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2002, 2002

1998
A New Tuning Scheme for Continuous Time Filters.
Proceedings of the 11th International Conference on VLSI Design (VLSI Design 1991), 1998

A Low Power Video Frequency Continuous Time Filter.
Proceedings of the 11th International Conference on VLSI Design (VLSI Design 1991), 1998

A Novel Translinear Principle Based BiMOS Transconductor.
Proceedings of the 11th International Conference on VLSI Design (VLSI Design 1991), 1998

1997
Tuning Schemes for Transmission Zeros of Continuous-Time Filters.
Proceedings of the 10th International Conference on VLSI Design (VLSI Design 1997), 1997

1996
A 20MHz CMOS Variable Gain Amplifier.
Proceedings of the 9th International Conference on VLSI Design (VLSI Design 1996), 1996

1988
Magnitude locked loop.
Proc. IEEE, 1988

1987
A novel technique for the on-chip tuning of monolithic filters.
Proc. IEEE, 1987

1986
Mridangam Simulation.
Proceedings of the 1986 International Computer Music Conference, 1986


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