K. S. Gurumurthy

According to our database1, K. S. Gurumurthy authored at least 12 papers between 2003 and 2013.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of six.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2013
Realization of Basic Gates Using Universal Logic Blocks in Quantum Dot Cellular Automata.
Proceedings of the 6th International Conference on Emerging Trends in Engineering and Technology, 2013

Instruction Level Power Analysis for Low Power VLSI Applications.
Proceedings of the 6th International Conference on Emerging Trends in Engineering and Technology, 2013

2012
Deploying Health Monitoring ECU Towards Enhancing the Performance of In-Vehicle Network
CoRR, 2012

Implementation of Gating Technique with Modified Scan Flip-Flop for Low Power Testing of VLSI Chips.
Proceedings of the Progress in VLSI Design and Test - 16th International Symposium, 2012

2011
Design of High Performance Quaternary Adders.
Proceedings of the 41st IEEE International Symposium on Multiple-Valued Logic, 2011

2010
New Improved Echo Canceller Based on Normalized LMS Adaptive Filter for Single Talk and Double Talk Detection, Subband Echo Cancellation, Acoustic Echo Cancellation.
J. Next Gener. Inf. Technol., 2010

Sub Band Speech Analysis Using Gammatone Filter Banks and Optimal Pitch Extraction Methods for Each Sub Band Using Average Magnitude Difference Function (AMDF) for LPC Speech Coders in Noisy Environments.
J. Next Gener. Inf. Technol., 2010

Arithmetic Operations in Multi-Valued Logic
CoRR, 2010

2009
Moving From Binary Towards Multi-valued logic.
Proceedings of the 2009 International Conference on Computer Design, 2009

Load Balancing towards ECU Integration.
Proceedings of the ARTCom 2009, 2009

Load Balancing in Multi ECU Configuration.
Proceedings of the ARTCom 2009, 2009

2003
Artificial neural networks as building blocks of mixed signal FPGA.
Proceedings of the 2003 IEEE International Conference on Field-Programmable Technology, 2003


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