K. Uday Bhaskar

According to our database1, K. Uday Bhaskar authored at least 2 papers in 2005.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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PhD thesis 
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Links

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Bibliography

2005
A Universal Random Test Generator for Functional Verification of Microprocessors and System-on-Chip.
Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005

A Framework for Automatic Assembly Program Generator (A<sup>2</sup>PG) for Verification and Testing of Processor Cores.
Proceedings of the 14th Asian Test Symposium (ATS 2005), 2005


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