Kailasnath Maneparambil

According to our database, Kailasnath Maneparambil authored at least 2 papers between 2005 and 2007.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2007

A Scalable Symbolic Simulator for Verilog RTL.

Sasidhar Sunkari, Supratik Chakraborty, Vivekananda M. Vedula, Kailasnath Maneparambil

Proceedings of the Eighth International Workshop on Microprocessor Test and Verification (MTV 2007), 2007

2005

A Framework for Automatic Assembly Program Generator (A²PG) for Verification and Testing of Processor Cores.

K. Uday Bhaskar, M. Prasanth, V. Kamakoti, Kailasnath Maneparambil

Proceedings of the 14th Asian Test Symposium (ATS 2005), 2005