Kaifeng Xia

According to our database, Kaifeng Xia authored at least 6 papers between 2013 and 2017.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2017

A Memory-Based FFT Processor Design With Generalized Efficient Conflict-Free Address Schemes.

Kaifeng Xia, Bin Wu, Tao Xiong, Tian-Chun Ye

IEEE Trans. Very Large Scale Integr. Syst., 2017

A Hardware Efficient Multiple-Stream Pipeline FFT Processor for MIMO-OFDM Systems.

Kaifeng Xia, Bin Wu, Tao Xiong, Tian-Chun Ye, Cheng-Ying Chen

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2017

Design of a High-Throughput Sliding Block Viterbi Decoder for IEEE 802.11ac WLAN Systems.

Kaifeng Xia, Bin Wu, Tao Xiong, Cheng-Ying Chen

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2017

2016

A generalized conflict-free address scheme for arbitrary 2k-point memory-based FFT processors.

Kaifeng Xia, Bin Wu, Xiaoping Zhou, Tao Xiong

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

An efficient prime factor memory-based FFT processor for LTE systems.

Kaifeng Xia, Bin Wu, Xiaoping Zhou, Tao Xiong

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

2013

A configurable distributed systolic array for QR decomposition in MIMO-OFDM systems.

Yong-xu Zhu, Bin Wu, Yumei Zhou, Kaifeng Xia, Lu Sun

Proceedings of the IEEE 10th International Conference on ASIC, 2013