Kaiwen Zhou

Orcid: 0000-0002-0441-3561

Affiliations:
  • Fudan University, State Key Laboratory of Integrated Chips and Systems, Shanghai, China


According to our database1, Kaiwen Zhou authored at least 7 papers between 2024 and 2026.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

Online presence:

On csauthors.net:

Bibliography

2026
A -117.1-dB THD Audio DAC Utilizing Single Vector Quantizer for Simultaneous Mismatch and ISI Shaping.
IEEE J. Solid State Circuits, June, 2026

4.1 A 0.64mA, -108.2dB THD+N Class-D Amplifier with Neural-Assisted Pre-Reconfiguration for Smart Power Optimization.
Proceedings of the IEEE International Solid-State Circuits Conference, 2026

21.3 A Temperature- and Aging-Compensated TMR Current Sensor with ±0.13% Sensitivity Variation from -40°C to 120°C.
Proceedings of the IEEE International Solid-State Circuits Conference, 2026

2025
A-117.1dB THD Audio Decoder Utilizing Single Vector Quantizer for Simultaneous Mismatch and ISI Shaping.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2025

2024
A 0.00055% THD + N Class-D Audio Amplifier With Capacitive Feedforward PWM and Wide-Band Aliasing Reduction.
IEEE J. Solid State Circuits, December, 2024

21.2 A 0.81mA, -105.2dB THD+N Class-D Audio Amplifier with Capacitive Feedforward and PWM-Aliasing Reduction for Wide-Band-Effective Linearity Improvement.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024

A 103.6dB-SNDR 760mVPP-Input-Range 7.8GΩ-Input-Impedance Direct-Digitization Sensor Readout with Pseudo-Differential Transconductors and Dummy DAC.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2024


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