Kalindu Herath

Orcid: 0000-0002-9705-6988

According to our database1, Kalindu Herath authored at least 8 papers between 2017 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2021
Power-Efficient Mapping of Large Applications on Modern Heterogeneous FPGAs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

2020
Mapping large-scale systems on to high density FPGAs
PhD thesis, 2020

2018
Ant Colony Optimization based Module Footprint Selection and Placement for Lowering Power in Large FPGA Designs.
Proceedings of the 2018 International Conference on ReConFigurable Computing and FPGAs, 2018

Communication-Aware Module Placement for Power Reduction in Large FPGA Designs.
Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018

Wibheda+: Framework for Data Dependency-aware Multi-constrained Hardware-Software Partitioning in FPGA-based SoCs for IoT Applications.
Proceedings of the 9th International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies, 2018

Wibheda: Framework for Data Dependency-Aware Multi-Constrained Hardware-Software Partitioning in FPGA-Based SoCs for IoT Devices.
Proceedings of the 26th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2018

Performance Estimation of FPGA Modules for Modular Design Methodology Using Artificial Neural Network.
Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2018

2017
Communication-aware Partitioning for Energy Optimization of Large FPGA Designs.
Proceedings of the on Great Lakes Symposium on VLSI 2017, 2017


  Loading...