Kalle I. Palomäki

Orcid: 0009-0000-8210-5700

According to our database1, Kalle I. Palomäki authored at least 3 papers in 2025.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2025
Memory Optimized, High Signal Quality Direct Digital Frequency Synthesizer on an FPGA.
IEEE Trans. Circuits Syst. II Express Briefs, July, 2025

Memory-Less 12-Bit Direct Digital Frequency Synthesizer Architecture on FPGA.
Proceedings of the 32nd IEEE International Conference on Electronics, Circuits and Systems, 2025

Resource Efficient Direct Digital Frequency Synthesizer Architecture on FPGA.
Proceedings of the 32nd IEEE International Conference on Electronics, Circuits and Systems, 2025


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