Jari Nurmi
Orcid: 0000-0003-2169-4606Affiliations:
- Tampere University of Technology, Department of Electronics and Communications Engineering, Finland
According to our database1,
Jari Nurmi
authored at least 265 papers
between 1994 and 2024.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
Online presence:
-
on scopus.com
-
on cs.tut.fi
-
on publons.com
-
on orcid.org
-
on d-nb.info
On csauthors.net:
Bibliography
2024
IEEE Trans. Mob. Comput., May, 2024
Guest Editorial Selected Papers From IEEE Nordic Circuits and Systems Conference (NorCAS) 2022.
IEEE Trans. Very Large Scale Integr. Syst., January, 2024
Hard SyDR: A Benchmarking Environment for Global Navigation Satellite System Algorithms.
Sensors, January, 2024
Ionospheric Error Models for Satellite-Based Navigation - Paving the Road towards LEO-PNT Solutions.
Comput., 2024
2023
Approximation Opportunities in Edge Computing Hardware: A Systematic Literature Review.
ACM Comput. Surv., December, 2023
Comput. Networks, September, 2023
Evaluation of Low-Complexity Adaptive Full Direct-State Kalman Filter for Robust GNSS Tracking.
Sensors, April, 2023
Direction of Arrival Method for L-Shaped Array with RF Switch: An Embedded Implementation Perspective.
Sensors, March, 2023
IEEE Internet Things J., February, 2023
Supplementary materials for "TUJI1 Dataset: Multi-device dataset for indoor localization with high measurement density".
Dataset, February, 2023
IEEE Commun. Surv. Tutorials, 2023
On Applicability of Imagery-Based CNN to Computational Offloading Location Selection.
IEEE Access, 2023
Will Edge Computing Enable Location based Extended/Mixed Reality Mobile Gaming? Demystifying Trade-off of Execution Time vs. Energy Consumption.
Proceedings of Work-in-Progress in Hardware and Software for Location Computation (WIPHAL 2023), 2023
Proceedings of Work-in-Progress in Hardware and Software for Location Computation (WIPHAL 2023), 2023
Proceedings of the IEEE Nordic Circuits and Systems Conference, 2023
Classification of freezing of gait using accelerometer data: A systematic performance evaluation approach.
Proceedings of the 8th international Workshop on Sensor-Based Activity Recognition and Artificial Intelligence, 2023
Proceedings of the International Conference on Localization and GNSS, 2023
Proceedings of the 33rd International Conference on Field-Programmable Logic and Applications, 2023
Proceedings of the 26th Euromicro Conference on Digital System Design, 2023
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
2022
A Machine-Learning-Based Analysis of the Relationships between Loneliness Metrics and Mobility Patterns for Elderly.
Sensors, 2022
Managing Perceived Loneliness and Social-Isolation Levels for Older Adults: A Survey with Focus on Wearables-Based Solutions.
Sensors, 2022
Cloud Platforms for Context-Adaptive Positioning and Localisation in GNSS-Denied Scenarios - A Systematic Review.
Sensors, 2022
Performance Evaluation of Adaptive Tracking Techniques with Direct-State Kalman Filter.
Sensors, 2022
Proceedings of the 96th Vehicular Technology Conference, 2022
Proceedings of the 23rd IEEE International Conference on Mobile Data Management, 2022
SURIMI: Supervised Radio Map Augmentation with Deep Learning and a Generative Adversarial Network for Fingerprint-based Indoor Positioning.
Proceedings of the 12th IEEE International Conference on Indoor Positioning and Indoor Navigation, 2022
Fast Real-World Implementation of a Direction of Arrival Method for Constrained Embedded IoT Devices.
Proceedings of the 12th International Conference on the Internet of Things, 2022
Proceedings of the 14th International Congress on Ultra Modern Telecommunications and Control Systems and Workshops, 2022
Implementation of Embedded Multiple Signal Classification Algorithm for Mesh IoT Networks.
Proceedings of the 2022 International Conference on Localization and GNSS, 2022
Proceedings of the 2022 International Conference on Localization and GNSS, 2022
Proceedings of the 2022 International Conference on Localization and GNSS, 2022
Proceedings of the 2022 International Conference on Localization and GNSS, 2022
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022
2021
Sensors, 2021
Systematic Review on Machine-Learning Algorithms Used in Wearable-Based eHealth Data Analysis.
IEEE Access, 2021
Intelligent Cognitive Radio Architecture Applying Machine Learning and Reconfigurability.
Proceedings of the IEEE Nordic Circuits and Systems Conference, NorCAS 2021, Oslo, 2021
Towards Ubiquitous Indoor Positioning: Comparing Systems across Heterogeneous Datasets.
Proceedings of the International Conference on Indoor Positioning and Indoor Navigation, 2021
Proceedings of the International Conference on Indoor Positioning and Indoor Navigation, 2021
Understanding the Performance of Task Offloading for Wearables in a Two-Tier Edge Architecture.
Proceedings of the 13th International Congress on Ultra Modern Telecommunications and Control Systems and Workshops, 2021
Proceedings of the 11th International Conference on Localization and GNSS, 2021
Proceedings of the 22nd IEEE International Conference on High Performance Switching and Routing, 2021
Proceedings of the CF '21: Computing Frontiers Conference, 2021
2020
Effects of Multipath Attenuation in the Optical Communication-Based Internet of Underwater Things.
Sensors, 2020
Microprocess. Microsystems, 2020
IEEE Access, 2020
IEEE Access, 2020
Improving DBSCAN for Indoor Positioning Using Wi-Fi Radio Maps in Wearable and IoT Devices.
Proceedings of the 12th International Congress on Ultra Modern Telecommunications and Control Systems and Workshops, 2020
RSS Fingerprinting Dataset Size Reduction Using Feature-Wise Adaptive k-Means Clustering.
Proceedings of the 12th International Congress on Ultra Modern Telecommunications and Control Systems and Workshops, 2020
Proceedings of the 12th International Congress on Ultra Modern Telecommunications and Control Systems and Workshops, 2020
New Cluster Selection and Fine-grained Search for k-Means Clustering and Wi-Fi Fingerprinting.
Proceedings of the 2020 International Conference on Localization and GNSS, 2020
Proceedings of the International Conference on Localization and GNSS (ICL-GNSS 2020), Tampere, Finland, June 2nd to 4th, 2020, 2020
2019
An Explicitly Parallel Architecture for Packet Processing in Software Defined Networks.
Proceedings of the 2019 IEEE Nordic Circuits and Systems Conference, 2019
Proceedings of the 20th IEEE International Conference on High Performance Switching and Routing, 2019
2018
Errata to "Evaluation of a Heterogeneous Multicore Architecture by Design and Test of an OFDM Receiver".
IEEE Trans. Parallel Distributed Syst., 2018
IEEE Signal Process. Lett., 2018
A low-cost high-speed self-checking carry select adder with multiple-fault detection.
Microelectron. J., 2018
Power mitigation of a heterogeneous multicore architecture on FPGA/ASIC by DFS/DVFS techniques.
Microprocess. Microsystems, 2018
Proceedings of the 2018 IEEE Nordic Circuits and Systems Conference, 2018
Design and Implementation of 2D IDCT/IDST-Specific Accelerator on Heterogeneous Multicore Architecture.
Proceedings of the 2018 IEEE Nordic Circuits and Systems Conference, 2018
Design and Implementation of Multi-Purpose DCT/DST-Specific Accelerator on Heterogeneous Multicore Architecture.
Proceedings of the 2018 IEEE Nordic Circuits and Systems Conference, 2018
Proceedings of the 8th International Conference on Localization and GNSS, 2018
Proceedings of the 29th IEEE International Conference on Application-specific Systems, 2018
2017
Power Mitigation by Performance Equalization in a Heterogeneous Reconfigurable Multicore Architecture.
J. Signal Process. Syst., 2017
J. Signal Process. Syst., 2017
Evaluation of a Heterogeneous Multicore Architecture by Design and Test of an OFDM Receiver.
IEEE Trans. Parallel Distributed Syst., 2017
Integration issues of a run-time configurable memory management unit to a RISC processor on FPGA.
Microprocess. Microsystems, 2017
FPGA Implementation Issues of a Flexible Synchronizer Suitable for NC-OFDM-Based Cognitive Radios.
J. Syst. Archit., 2017
Power mitigation of a heterogeneous multicore architecture by frequency scaling in an OFDM receiver test case.
Proceedings of the IEEE Nordic Circuits and Systems Conference, 2017
Proceedings of the 13th International Wireless Communications and Mobile Computing Conference, 2017
HW/SW Co-design of an IEEE 802.11a/g Receiver on Xilinx Zynq SoC using High-Level Synthesis.
Proceedings of the 8th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, 2017
Proceedings of the Applied Reconfigurable Computing - 13th International Symposium, 2017
2016
HARP2: An X-Scale Reconfigurable Accelerator-Rich Platform for Massively-Parallel Signal Processing Algorithms.
J. Signal Process. Syst., 2016
Accelerating Computation on an Android Phone with OpenCL Parallelism and Optimizing Workload Distribution between a Phone and a Cloud Service.
Proceedings of the 2016 Intl IEEE Conferences on Ubiquitous Intelligence & Computing, 2016
Proceedings of the IEEE Nordic Circuits and Systems Conference, 2016
FPGA implementation and integration of a reconfigurable CAN-based co-processor to the coffee risc processor.
Proceedings of the IEEE Nordic Circuits and Systems Conference, 2016
Proceedings of the International Conference on Localization and GNSS, 2016
Proceedings of the 2016 IEEE International Conference on Acoustics, 2016
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
2015
Design and Implementation of a Power-aware FFT Core for OFDM-based DSA-enabled Cognitive Radios.
J. Signal Process. Syst., 2015
An example of scenario-based evaluation of military capability areas An impact assessment of alternative systems on operations.
Proceedings of the Annual IEEE Systems Conference, 2015
Design, implementation and analysis of a run-time configurable Memory Management Unit on FPGA.
Proceedings of the Nordic Circuits and Systems Conference, 2015
Design and evaluation of correlation accelerator in IEEE-802.11a/g receiver using a template-based Coarse-Grained Reconfigurable Array.
Proceedings of the Nordic Circuits and Systems Conference, 2015
Proceedings of the Nordic Circuits and Systems Conference, 2015
Proceedings of the International Conference on Location and GNSS, 2015
Proceedings of the 2015 IEEE Globecom Workshops, San Diego, CA, USA, December 6-10, 2015, 2015
Implementation of IEEE-802.11a/g receiver blocks on a coarse-grained reconfigurable array.
Proceedings of the 2015 Conference on Design and Architectures for Signal and Image Processing, 2015
2014
ACM Trans. Embed. Comput. Syst., 2014
MPSoC based on Transport Triggered Architecture for baseband processing of an LTE receiver.
J. Syst. Archit., 2014
EURASIP J. Adv. Signal Process., 2014
Cyclostationary features of downsampled 802.11g OFDM signal for cognitive positioning systems.
Proceedings of the 11th International Symposium on Wireless Communications Systems, 2014
Proceedings of the 11th International Symposium on Wireless Communications Systems, 2014
Design of a Flexible, Energy Efficient (Auto)Correlator Block for Timing Synchronization.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2014
Proceedings of the 2014 International Symposium on System-on-Chip, 2014
Proceedings of the International Conference on Localization and GNSS, 2014
Proceedings of the International Conference on Localization and GNSS, 2014
Proceedings of the International Conference on Localization and GNSS, 2014
Proceedings of the 10th European Workshop on Microelectronics Education (EWME), 2014
Proceedings of the 10th European Workshop on Microelectronics Education (EWME), 2014
Proceedings of the 2014 Conference on Design and Architectures for Signal and Image Processing, 2014
Design of an accelerator-rich architecture by integrating multiple heterogeneous coarse grain reconfigurable arrays over a network-on-chip.
Proceedings of the IEEE 25th International Conference on Application-Specific Systems, 2014
2013
Int. J. Embed. Real Time Commun. Syst., 2013
Int. J. Embed. Real Time Commun. Syst., 2013
Proceedings of the 2013 International Conference on Embedded Computer Systems: Architectures, 2013
Proceedings of the 2013 NORCHIP, Vilnius, Lithuania, November 11-12, 2013, 2013
Design & implementation of software defined radios on a homogeneous multi-processor architecture.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2013
Proceedings of the International Conference on Indoor Positioning and Indoor Navigation, 2013
Evaluation of WCDMA receiver baseband processing on a Multi-Processor System-On-Chip.
Proceedings of the 18th International Conference on Digital Signal Processing, 2013
Efficient bit decoding implementation for mass market multi-constellation GNSS receivers.
Proceedings of the 2013 Conference on Design and Architectures for Signal and Image Processing, 2013
Proceedings of the 2013 Conference on Design and Architectures for Signal and Image Processing, 2013
Proceedings of the 2013 Conference on Design and Architectures for Signal and Image Processing, 2013
Correctly rounded architectures for Floating-Point multi-operand addition and dot-product computation.
Proceedings of the 24th International Conference on Application-Specific Systems, 2013
A Reconfigurable Application-specific Instruction-set Processor for Fast Fourier Transform processing.
Proceedings of the 24th International Conference on Application-Specific Systems, 2013
2012
Designing Fast Fourier Transform Accelerators for Orthogonal Frequency-Division Multiplexing Systems.
J. Signal Process. Syst., 2012
International Conference on Localization and Global Navigation Satellite Systems 2011.
Int. J. Embed. Real Time Commun. Syst., 2012
Int. J. Embed. Real Time Commun. Syst., 2012
Energy and power estimation of Coarse-Grain Reconfigurable Array based Fast Fourier Transform accelerators.
Proceedings of the 7th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), 2012
Effects of scaling a coarse-grain reconfigurable array on power and energy consumption.
Proceedings of the 2012 International Symposium on System on Chip, 2012
Improving logic-to-memory ratio in an embedded Multi-Processor system via code compression.
Proceedings of the 2012 International Symposium on System on Chip, 2012
Proceedings of the International Conference on Localization and GNSS, 2012
Proceedings of the International Conference on Localization and GNSS, 2012
Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012
2011
J. Signal Process. Syst., 2011
Int. J. Embed. Real Time Commun. Syst., 2011
EURASIP J. Wirel. Commun. Netw., 2011
Proceedings of the 2nd IEEE International Conference on Networked Embedded Systems for Enterprise Applications, 2011
Proceedings of the 2011 International Symposium on System on Chip, 2011
Improving Reconfigurable Hardware Energy Efficiency and Robustness via DVFS-Scaled Homogeneous MP-SoC.
Proceedings of the 25th IEEE International Symposium on Parallel and Distributed Processing, 2011
Proceedings of the 2011 International Conference on Indoor Positioning and Indoor Navigation, 2011
Proceedings of the 2011 Conference on Design and Architectures for Signal and Image Processing, 2011
System Level Performance Simulation of Distributed GENESYS Applications on Multi-core Platforms.
Proceedings of the IEEE Ninth International Conference on Dependable, 2011
Proceedings of the 2011 NASA/ESA Conference on Adaptive Hardware and Systems, 2011
2010
IEEE Micro, 2010
Microprocess. Microsystems, 2010
A coarse-grain reconfigurable architecture for multimedia applications supporting subword and floating-point calculations.
J. Syst. Archit., 2010
Joint Validation of Application Models and Multi-Abstraction Network-on-Chip Platforms.
Int. J. Embed. Real Time Commun. Syst., 2010
Int. J. Embed. Real Time Commun. Syst., 2010
Proceedings of the 7th Workshop on Positioning Navigation and Communication, 2010
GRAMMAR: Challenges and solutions for multi-constellation Mass Market user Receivers.
Proceedings of the Ubiquitous Positioning Indoor Navigation and Location Based Service, 2010
Proceedings of the Ubiquitous Positioning Indoor Navigation and Location Based Service, 2010
Proceedings of the Ubiquitous Positioning Indoor Navigation and Location Based Service, 2010
Implementation of Conditional Execution on a Coarse-Grain Reconfigurable Array.
Proceedings of the 5th International Workshop on Reconfigurable Communication-centric Systems on Chip, 2010
Timing Synchronization for a Multi-Standard Receiver on a Multi-Processor System-onChip.
Proceedings of the 5th International Workshop on Reconfigurable Communication-centric Systems on Chip, 2010
Proceedings of the 2010 International Symposium on System on Chip, SoC 2010, Tampere, 2010
A case study of hierarchically heterogeneous application modelling using UML and Ptolemy II.
Proceedings of the 2010 International Symposium on System on Chip, SoC 2010, Tampere, 2010
From Y-chart to seamless integration of application design and performance simulation.
Proceedings of the 2010 International Symposium on System on Chip, SoC 2010, Tampere, 2010
Exploiting control management to accelerate Radix-4 FFT on a reconfigurable platform.
Proceedings of the 2010 International Symposium on System on Chip, SoC 2010, Tampere, 2010
Proceedings of the 2010 International Symposium on System on Chip, SoC 2010, Tampere, 2010
Proceedings of the 2010 International Symposium on System on Chip, SoC 2010, Tampere, 2010
Ad-hoc networks aiding indoor calibrations of heterogeneous devices for Fingerprinting applications.
Proceedings of the 2010 International Conference on Indoor Positioning and Indoor Navigation, 2010
Proceedings of the 39th International Conference on Parallel Processing, 2010
Proceedings of the 17th IEEE International Conference on Electronics, 2010
Control Techniques for Coupling a Coarse-Grain Reconfigurable Array with a Generic RISC Core.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2010
Instantiating GENESYS Application Architecture Modeling via UML 2.0 Constructs and MARTE Profile.
Proceedings of the 13th Euromicro Conference on Digital System Design, 2010
Proceedings of the 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2010
2009
EURASIP J. Embed. Syst., 2009
Proceedings of the IEEE Workshop on Signal Processing Systems, 2009
Implementation of the W-CDMA cell search on a MPSOC designed for software defined radios.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2009
Implementation of W-CDMA Cell Search on a FPGA Based Multi-Processor System-on-Chip with Power Management.
Proceedings of the Embedded Computer Systems: Architectures, 2009
Proceedings of the 2008 IEEE International Symposium on System-on-Chip, 2009
Proceedings of the 2008 IEEE International Symposium on System-on-Chip, 2009
Fault-tolerant communication over Micronmesh NOC with Micron Message-Passing protocol.
Proceedings of the 2008 IEEE International Symposium on System-on-Chip, 2009
Proceedings of the 2008 IEEE International Symposium on System-on-Chip, 2009
Proceedings of the 2008 IEEE International Symposium on System-on-Chip, 2009
Proceedings of the Fifth International Conference on Networking and Services, 2009
Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009
Proceedings of the Future Multimedia Networking, Second International Workshop, 2009
2008
Design space exploration of an open-source, IP-reusable, scalable floating-point engine for embedded applications.
J. Syst. Archit., 2008
A coarse-grain reconfigurable architecture for multimedia applications featuring subword computation capabilities.
J. Real Time Image Process., 2008
EURASIP J. Embed. Syst., 2008
Proceedings of the IEEE Third International Symposium on Industrial Embedded Systems, 2008
A simplified executable model to evaluate latency and throughput of networks-on-chip.
Proceedings of the 21st Annual Symposium on Integrated Circuits and Systems Design, 2008
Proceedings of the 2008 IEEE International Symposium on System-on-Chip, 2008
Proceedings of the 2008 IEEE International Symposium on System-on-Chip, 2008
Proceedings of the 2008 IEEE International Symposium on System-on-Chip, 2008
Implementation of a floating-point matrix-vector multiplication on a reconfigurable architecture.
Proceedings of the 22nd IEEE International Symposium on Parallel and Distributed Processing, 2008
Reconfigurable hardware: The holy grail of matching performance with programming productivity.
Proceedings of the FPL 2008, 2008
A dedicated DMA logic addressing a time multiplexed memory to reduce the effects of the system bus bottleneck.
Proceedings of the FPL 2008, 2008
Improving the Efficiency of Run Time Reconfigurable Devices by Configuration Locking.
Proceedings of the Design, Automation and Test in Europe, 2008
2007
Comparison of a Ring On-Chip Network and a Code-Division Multiple-Access On-Chip Network.
VLSI Design, 2007
IEEE Trans. Very Large Scale Integr. Syst., 2007
Static scheduling techniques for dependent tasks on dynamically reconfigurable devices.
J. Syst. Archit., 2007
IET Comput. Digit. Tech., 2007
Experiences of Using Object Oriented Programming Methods in High Level Network-on-Chip and System-on-Chip Design.
Proceedings of the 3rd International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2007
Implementation of a 2D low-pass image filtering algorithm on a reconfigurable device.
Proceedings of the 3rd International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2007
A Configuration Locking Technique to Reduce the Configuration Overhead of Run-Time Reconfigurable Devices.
Proceedings of the International Symposium on System-on-Chip, 2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Interactive presentation: Using dynamic voltage scaling to reduce the configuration energy of run time reconfigurable devices.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007
2006
Proceedings of the IEEE Workshop on Signal Processing Systems, 2006
Performance enhancements for embedded software implementation of GNSS navigation algorithms.
Proceedings of the International Symposium on Industrial Embedded Systems, 2006
A Coarse-Grain Reconfigurable Machine with Floating-Point Arithmetic Capabilities.
Proceedings of the 2nd International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2006
Proceedings of the IEEE 17th International Symposium on Personal, 2006
Using Constraint Programming to Achieve Optimal Prefetch Scheduling for Dependent Tasks on Run-Time Reconfigurable Devices.
Proceedings of the International Symposium on System-on-Chip, 2006
Design And Verification of a VHDL Model of a Floating-Point Unit for a RISC Microprocessor.
Proceedings of the International Symposium on System-on-Chip, 2006
Prototyping a Globally Asynchronous Locally Synchronous Network-On-Chip on a Conventional FPGA Device Using Synchronous Design Tools.
Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006
On-Line Reconfigurable XGFT Network-on-Chip Designed for Improving the Fault-Tolerance and Manufacturability of the MPSoC Chips.
Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006
Proceedings of the 9th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2006), 2006
Proceedings of the Conference on Design, Automation and Test in Europe, 2006
2005
Proceedings of the IEEE Wireless Communications and Networking Conference, 2005
System Monitoring and Reconfiguration in Proteo NoC.
Proceedings of the 1st International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2005
Proceedings of the 2005 International Conference on Microelectronics Systems Education, 2005
Proceedings of the 2005 International Symposium on System-on-Chip, 2005
Proceedings of the 2005 International Symposium on System-on-Chip, 2005
A Synchronization Coprocessor Architecture for WCDMA/OFDM Mobile Terminal Implementations.
Proceedings of the 2005 International Symposium on System-on-Chip, 2005
Proceedings of the 2005 International Symposium on System-on-Chip, 2005
Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005
Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005
Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005
2004
IEEE J. Solid State Circuits, 2004
Performance Evaluation and Implementation of Two Adaptive Routing Algorithms for XGFT Networks.
Comput. Artif. Intell., 2004
Proceedings of the Sixth International Workshop on System-Level Interconnect Prediction (SLIP 2004), 2004
Proceedings of the 2004 ACM Symposium on Applied Computing (SAC), 2004
Packet scheduling in proteo network-on-chip.
Proceedings of the IASTED International Conference on Parallel and Distributed Computing and Networks, 2004
Proceedings of the 2004 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2004), 2004
Proceedings of the 2004 International Symposium on System-on-Chip, 2004
Topology design for global link optimization in application specific network-on-chips.
Proceedings of the 2004 International Symposium on System-on-Chip, 2004
Proceedings of the 2004 International Symposium on System-on-Chip, 2004
Hardware unit for OVSF/Walsh/Hadamard code generation [3G mobile communication applications].
Proceedings of the 2004 International Symposium on System-on-Chip, 2004
Proceedings of the 2004 International Symposium on System-on-Chip, 2004
Proceedings of the 2004 International Symposium on System-on-Chip, 2004
Proceedings of the 2004 International Symposium on System-on-Chip, 2004
Proceedings of the 2004 International Symposium on System-on-Chip, 2004
Proceedings of the 2004 International Symposium on System-on-Chip, 2004
Proceedings of the 2004 International Symposium on System-on-Chip, 2004
Proceedings of the 9th IEEE Symposium on Computers and Communications (ISCC 2006), June 28, 2004
Improved multicast switch architecture for optical cable television and video surveillance networks.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
Proceedings of the Field Programmable Logic and Application, 2004
2003
Reprogrammable Algorithm Accelerator IP Block.
Proceedings of the IFIP VLSI-SoC 2003, 2003
A Branch File for a Configurable DSP Core.
Proceedings of the International Conference on VLSI, 2003
Proceedings of the 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC'03), 30 June, 2003
Proceedings of the 2003 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2003), 2003
Implementing user and application specific algorithms within IP-methodology: a coarse-grain-approach.
Proceedings of the 2003 International Symposium on System-on-Chip, 2003
Proceedings of the 2003 International Symposium on System-on-Chip, 2003
Proceedings of the 2003 International Symposium on System-on-Chip, 2003
Proceedings of the 2003 International Symposium on System-on-Chip, 2003
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
Proceedings of the ESSCIRC 2003, 2003
Proceedings of the 14th IEEE International Conference on Application-Specific Systems, 2003
Proceedings of the Networks on Chip, 2003
2002
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
Proceedings of the Seventh IEEE International High-Level Design Validation and Test Workshop 2002, 2002
Advanced Instruction Set Architectures for Reducing Program Memory Usage in a DSP Processor.
Proceedings of the 1st IEEE International Workshop on Electronic Design, 2002
Proceedings of the 1st IEEE International Workshop on Electronic Design, 2002
2001
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001
1997
1995
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995
1994
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994
An Overall FIR Filter Optimization Tool for High Granularity Implementation Technologies.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994
Proceedings of ICASSP '94: IEEE International Conference on Acoustics, 1994
Proceedings of the Proceedings EURO-DAC'94, 1994